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ccc199edda
New helper functions to get GPIO banks configuration from the FDT. stm32_get_gpio_bank_pinctrl_node() allows stm32mp platforms to differentiate specific GPIO banks when these are defined with a specific path in the FDT. fdt_get_gpio_bank_pin_count() returns the number of pins in a GPIO bank as it depends on the SoC variant. Change-Id: I4481774152b3c6bf35bf986f58e357c2f9c19176 Signed-off-by: Etienne Carriere <etienne.carriere@st.com>
97 lines
3.1 KiB
C
97 lines
3.1 KiB
C
/*
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* Copyright (C) 2018-2020, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STM32MP_COMMON_H
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#define STM32MP_COMMON_H
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#include <stdbool.h>
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#include <platform_def.h>
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/* Functions to save and get boot context address given by ROM code */
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void stm32mp_save_boot_ctx_address(uintptr_t address);
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uintptr_t stm32mp_get_boot_ctx_address(void);
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bool stm32mp_is_single_core(void);
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bool stm32mp_is_closed_device(void);
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/* Return the base address of the DDR controller */
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uintptr_t stm32mp_ddrctrl_base(void);
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/* Return the base address of the DDR PHY */
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uintptr_t stm32mp_ddrphyc_base(void);
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/* Return the base address of the PWR peripheral */
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uintptr_t stm32mp_pwr_base(void);
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/* Return the base address of the RCC peripheral */
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uintptr_t stm32mp_rcc_base(void);
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/* Check MMU status to allow spinlock use */
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bool stm32mp_lock_available(void);
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/* Get IWDG platform instance ID from peripheral IO memory base address */
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uint32_t stm32_iwdg_get_instance(uintptr_t base);
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/* Return bitflag mask for expected IWDG configuration from OTP content */
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uint32_t stm32_iwdg_get_otp_config(uint32_t iwdg_inst);
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#if defined(IMAGE_BL2)
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/* Update OTP shadow registers with IWDG configuration from device tree */
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uint32_t stm32_iwdg_shadow_update(uint32_t iwdg_inst, uint32_t flags);
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#endif
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/*
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* Platform util functions for the GPIO driver
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* @bank: Target GPIO bank ID as per DT bindings
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*
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* Platform shall implement these functions to provide to stm32_gpio
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* driver the resource reference for a target GPIO bank. That are
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* memory mapped interface base address, interface offset (see below)
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* and clock identifier.
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*
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* stm32_get_gpio_bank_offset() returns a bank offset that is used to
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* check DT configuration matches platform implementation of the banks
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* description.
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*/
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uintptr_t stm32_get_gpio_bank_base(unsigned int bank);
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unsigned long stm32_get_gpio_bank_clock(unsigned int bank);
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uint32_t stm32_get_gpio_bank_offset(unsigned int bank);
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/* Return node offset for target GPIO bank ID @bank or a FDT error code */
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int stm32_get_gpio_bank_pinctrl_node(void *fdt, unsigned int bank);
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/* Print CPU information */
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void stm32mp_print_cpuinfo(void);
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/* Print board information */
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void stm32mp_print_boardinfo(void);
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/*
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* Util for clock gating and to get clock rate for stm32 and platform drivers
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* @id: Target clock ID, ID used in clock DT bindings
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*/
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bool stm32mp_clk_is_enabled(unsigned long id);
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void stm32mp_clk_enable(unsigned long id);
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void stm32mp_clk_disable(unsigned long id);
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unsigned long stm32mp_clk_get_rate(unsigned long id);
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/* Initialise the IO layer and register platform IO devices */
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void stm32mp_io_setup(void);
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/*
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* Check that the STM32 header of a .stm32 binary image is valid
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* @param header: pointer to the stm32 image header
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* @param buffer: address of the binary image (payload)
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* @return: 0 on success, negative value in case of error
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*/
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int stm32mp_check_header(boot_api_image_header_t *header, uintptr_t buffer);
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/* Functions to map DDR in MMU with non-cacheable attribute, and unmap it */
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int stm32mp_map_ddr_non_cacheable(void);
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int stm32mp_unmap_ddr(void);
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#endif /* STM32MP_COMMON_H */
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