arm-trusted-firmware/lib/extensions
Mark Brown bebcf27f1c feat(sve): support full SVE vector length
Currently the SVE code hard codes a maximum vector length of 512 bits
when configuring SVE rather than the architecture supported maximum.
While this is fine for current physical implementations the architecture
allows for vector lengths up to 2048 bits and emulated implementations
generally allow any length up to this maximum.

Since there may be system specific reasons to limit the maximum vector
length make the limit configurable, defaulting to the architecture
maximum. The default should be suitable for most implementations since
the hardware will limit the actual vector length selected to what is
physically supported in the system.

Signed-off-by: Mark Brown <broonie@kernel.org>
Change-Id: I22c32c98a81c0cf9562411189d8a610a5b61ca12
2022-07-08 17:17:11 +01:00
..
amu fix(amu): limit virtual offset register access to NS world 2022-04-28 20:30:42 +02:00
brbe feat(brbe): add brbe under feature detection mechanism 2022-06-06 11:43:03 +01:00
mpam refactor(mpam): remove initialization of EL2 registers when EL2 is used 2022-04-12 17:41:51 +02:00
mtpmu Add support for FEAT_MTPMU for Armv8.6 2020-12-11 12:49:20 +00:00
pauth TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U 2019-10-03 14:43:55 +01:00
ras lib/extensions/ras: fix bug of binary search 2021-01-14 09:27:16 +08:00
sme feat(sme): fall back to SVE if SME is not there 2022-07-05 11:37:18 +02:00
spe feat(spe): add support for FEAT_SPEv1p2 2022-02-10 09:30:13 +00:00
sve feat(sve): support full SVE vector length 2022-07-08 17:17:11 +01:00
sys_reg_trace feat(sys_reg_trace): enable trace system registers access from lower NS ELs 2021-08-26 09:29:51 +01:00
trbe feat(trbe): add trbe under feature detection mechanism 2022-06-06 11:43:14 +01:00
trf feat(trf): enable trace filter control register access from lower NS EL 2021-08-26 09:32:35 +01:00