mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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bdbbf48f4d
"regul" corresponds to a specific part of a global table that can't be undefined. Thus, checking if it is NULL is useless. Issue found by Coverity (CID 445089). Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Change-Id: Ic812bc1fde12fe8389677c7c72fb85246c50f5c9
470 lines
12 KiB
C
470 lines
12 KiB
C
/*
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* Copyright (C) 2024-2025, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <errno.h>
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#include <string.h>
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#include <common/debug.h>
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#include <drivers/st/stpmic2.h>
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#define RET_SUCCESS 0
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#define RET_ERROR_NOT_SUPPORTED -1
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#define RET_ERROR_GENERIC -2
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#define RET_ERROR_BAD_PARAMETERS -3
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#define I2C_TIMEOUT_MS 25
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#define VOLTAGE_INDEX_INVALID ((size_t)~0U)
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struct regul_struct {
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const char *name;
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const uint16_t *volt_table;
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uint8_t volt_table_size;
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uint8_t volt_cr;
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uint8_t volt_shift;
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uint8_t en_cr;
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uint8_t alt_en_cr;
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uint8_t msrt_reg;
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uint8_t msrt_mask;
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uint8_t pd_reg;
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uint8_t pd_val;
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uint8_t ocp_reg;
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uint8_t ocp_mask;
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};
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/* Voltage tables in mV */
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static const uint16_t buck1236_volt_table[] = {
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500U, 510U, 520U, 530U, 540U, 550U, 560U, 570U, 580U, 590U,
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600U, 610U, 620U, 630U, 640U, 650U, 660U, 670U, 680U, 690U,
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700U, 710U, 720U, 730U, 740U, 750U, 760U, 770U, 780U, 790U,
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800U, 810U, 820U, 830U, 840U, 850U, 860U, 870U, 880U, 890U,
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900U, 910U, 920U, 930U, 940U, 950U, 960U, 970U, 980U, 990U,
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1000U, 1010U, 1020U, 1030U, 1040U, 1050U, 1060U, 1070U, 1080U, 1090U,
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1100U, 1110U, 1120U, 1130U, 1140U, 1150U, 1160U, 1170U, 1180U, 1190U,
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1200U, 1210U, 1220U, 1230U, 1240U, 1250U, 1260U, 1270U, 1280U, 1290U,
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1300U, 1310U, 1320U, 1330U, 1340U, 1350U, 1360U, 1370U, 1380U, 1390U,
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1400U, 1410U, 1420U, 1430U, 1440U, 1450U, 1460U, 1470U, 1480U, 1490U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U
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};
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static const uint16_t buck457_volt_table[] = {
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U, 1500U,
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1500U, 1600U, 1700U, 1800U, 1900U, 2000U, 2100U, 2200U, 2300U, 2400U,
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2500U, 2600U, 2700U, 2800U, 2900U, 3000U, 3100U, 3200U, 3300U, 3400U,
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3500U, 3600U, 3700U, 3800U, 3900U, 4000U, 4100U, 4200U
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};
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static const uint16_t ldo235678_volt_table[] = {
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900U, 1000U, 1100U, 1200U, 1300U, 1400U, 1500U, 1600U, 1700U, 1800U,
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1900U, 2000U, 2100U, 2200U, 2300U, 2400U, 2500U, 2600U, 2700U, 2800U,
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2900U, 3000U, 3100U, 3200U, 3300U, 3400U, 3500U, 3600U, 3700U, 3800U,
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3900U, 4000U
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};
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static const uint16_t ldo1_volt_table[] = {
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1800U,
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};
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static const uint16_t ldo4_volt_table[] = {
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3300U,
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};
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static const uint16_t refddr_volt_table[] = {
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0,
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};
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#define DEFINE_BUCK(regu_name, ID, pd, table) { \
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.name = regu_name, \
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.volt_table = table, \
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.volt_table_size = ARRAY_SIZE(table), \
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.en_cr = ID ## _MAIN_CR2, \
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.volt_cr = ID ## _MAIN_CR1, \
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.alt_en_cr = ID ## _ALT_CR2, \
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.msrt_reg = BUCKS_MRST_CR, \
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.msrt_mask = ID ## _MRST, \
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.pd_reg = pd, \
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.pd_val = ID ## _PD_FAST, \
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.ocp_reg = FS_OCP_CR1, \
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.ocp_mask = FS_OCP_ ## ID, \
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}
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#define DEFINE_LDOx(regu_name, ID, table) { \
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.name = regu_name, \
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.volt_table = table, \
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.volt_table_size = ARRAY_SIZE(table), \
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.volt_shift = LDO_VOLT_SHIFT, \
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.en_cr = ID ## _MAIN_CR, \
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.volt_cr = ID ## _MAIN_CR, \
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.alt_en_cr = ID ## _ALT_CR, \
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.msrt_reg = LDOS_MRST_CR, \
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.msrt_mask = ID ## _MRST, \
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.pd_reg = LDOS_PD_CR1, \
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.pd_val = ID ## _PD, \
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.ocp_reg = FS_OCP_CR2, \
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.ocp_mask = FS_OCP_ ## ID, \
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}
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#define DEFINE_REFDDR(regu_name, ID, table) { \
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.name = regu_name, \
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.volt_table = table, \
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.volt_table_size = ARRAY_SIZE(table), \
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.en_cr = ID ## _MAIN_CR, \
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.volt_cr = ID ## _MAIN_CR, \
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.alt_en_cr = ID ## _ALT_CR, \
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.msrt_reg = BUCKS_MRST_CR, \
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.msrt_mask = ID ## _MRST, \
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.pd_reg = LDOS_PD_CR2, \
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.pd_val = ID ## _PD, \
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.ocp_reg = FS_OCP_CR1, \
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.ocp_mask = FS_OCP_ ## ID, \
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}
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/* Table of Regulators in PMIC SoC */
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static const struct regul_struct regul_table[STPMIC2_NB_REG] = {
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[STPMIC2_BUCK1] = DEFINE_BUCK("buck1", BUCK1, BUCKS_PD_CR1,
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buck1236_volt_table),
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[STPMIC2_BUCK2] = DEFINE_BUCK("buck2", BUCK2, BUCKS_PD_CR1,
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buck1236_volt_table),
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[STPMIC2_BUCK3] = DEFINE_BUCK("buck3", BUCK3, BUCKS_PD_CR1,
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buck1236_volt_table),
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[STPMIC2_BUCK4] = DEFINE_BUCK("buck4", BUCK4, BUCKS_PD_CR1,
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buck457_volt_table),
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[STPMIC2_BUCK5] = DEFINE_BUCK("buck5", BUCK5, BUCKS_PD_CR2,
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buck457_volt_table),
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[STPMIC2_BUCK6] = DEFINE_BUCK("buck6", BUCK6, BUCKS_PD_CR2,
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buck1236_volt_table),
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[STPMIC2_BUCK7] = DEFINE_BUCK("buck7", BUCK7, BUCKS_PD_CR2,
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buck457_volt_table),
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[STPMIC2_REFDDR] = DEFINE_REFDDR("refddr", REFDDR, refddr_volt_table),
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[STPMIC2_LDO1] = DEFINE_LDOx("ldo1", LDO1, ldo1_volt_table),
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[STPMIC2_LDO2] = DEFINE_LDOx("ldo2", LDO2, ldo235678_volt_table),
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[STPMIC2_LDO3] = DEFINE_LDOx("ldo3", LDO3, ldo235678_volt_table),
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[STPMIC2_LDO4] = DEFINE_LDOx("ldo4", LDO4, ldo4_volt_table),
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[STPMIC2_LDO5] = DEFINE_LDOx("ldo5", LDO5, ldo235678_volt_table),
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[STPMIC2_LDO6] = DEFINE_LDOx("ldo6", LDO6, ldo235678_volt_table),
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[STPMIC2_LDO7] = DEFINE_LDOx("ldo7", LDO7, ldo235678_volt_table),
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[STPMIC2_LDO8] = DEFINE_LDOx("ldo8", LDO8, ldo235678_volt_table),
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};
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int stpmic2_register_read(struct pmic_handle_s *pmic,
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uint8_t register_id, uint8_t *value)
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{
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int ret = stm32_i2c_mem_read(pmic->i2c_handle,
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pmic->i2c_addr,
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(uint16_t)register_id,
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I2C_MEMADD_SIZE_8BIT, value,
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1, I2C_TIMEOUT_MS);
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if (ret != 0) {
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ERROR("Failed to read reg:0x%x\n", register_id);
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}
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return ret;
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}
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int stpmic2_register_write(struct pmic_handle_s *pmic,
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uint8_t register_id, uint8_t value)
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{
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uint8_t val = value;
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int ret = stm32_i2c_mem_write(pmic->i2c_handle,
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pmic->i2c_addr,
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(uint16_t)register_id,
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I2C_MEMADD_SIZE_8BIT, &val,
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1, I2C_TIMEOUT_MS);
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if (ret != 0) {
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ERROR("Failed to write reg:0x%x\n", register_id);
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}
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return ret;
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}
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int stpmic2_register_update(struct pmic_handle_s *pmic,
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uint8_t register_id, uint8_t value, uint8_t mask)
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{
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int status;
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uint8_t val = 0U;
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status = stpmic2_register_read(pmic, register_id, &val);
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if (status != 0) {
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return status;
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}
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val = (val & ((uint8_t)~mask)) | (value & mask);
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VERBOSE("REG:0x%x v=0x%x mask=0x%x -> 0x%x\n",
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register_id, value, mask, val);
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return stpmic2_register_write(pmic, register_id, val);
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}
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int stpmic2_regulator_set_state(struct pmic_handle_s *pmic,
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uint8_t id, bool enable)
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{
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const struct regul_struct *regul = ®ul_table[id];
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if (enable) {
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return stpmic2_register_update(pmic, regul->en_cr, 1U, 1U);
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} else {
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return stpmic2_register_update(pmic, regul->en_cr, 0, 1U);
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}
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}
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int stpmic2_regulator_get_state(struct pmic_handle_s *pmic,
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uint8_t id, bool *enabled)
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{
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const struct regul_struct *regul = ®ul_table[id];
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uint8_t val;
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if (stpmic2_register_read(pmic, regul->en_cr, &val) != 0) {
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return RET_ERROR_GENERIC;
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}
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*enabled = (val & 1U) == 1U;
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return RET_SUCCESS;
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}
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int stpmic2_regulator_levels_mv(struct pmic_handle_s *pmic,
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uint8_t id, const uint16_t **levels,
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size_t *levels_count)
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{
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const struct regul_struct *regul = ®ul_table[id];
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if (levels_count != NULL) {
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*levels_count = regul->volt_table_size;
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}
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if (levels != NULL) {
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*levels = regul->volt_table;
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}
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return RET_SUCCESS;
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}
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int stpmic2_regulator_get_voltage(struct pmic_handle_s *pmic,
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uint8_t id, uint16_t *val)
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{
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const struct regul_struct *regul = ®ul_table[id];
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uint8_t value = 0U;
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uint8_t mask;
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if (regul->volt_table_size == 0U) {
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return RET_ERROR_GENERIC;
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}
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mask = regul->volt_table_size - 1U;
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if (mask != 0U) {
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if (stpmic2_register_read(pmic, regul->volt_cr, &value) != 0) {
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return RET_ERROR_GENERIC;
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}
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value = (value >> regul->volt_shift) & mask;
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}
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if (value > regul->volt_table_size) {
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return RET_ERROR_GENERIC;
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}
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*val = regul->volt_table[value];
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return RET_SUCCESS;
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}
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static size_t voltage_to_index(const struct regul_struct *regul,
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uint16_t millivolts)
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{
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unsigned int i;
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assert(regul->volt_table);
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for (i = 0U; i < regul->volt_table_size; i++) {
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if (regul->volt_table[i] == millivolts) {
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return i;
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}
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}
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return VOLTAGE_INDEX_INVALID;
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}
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int stpmic2_regulator_set_voltage(struct pmic_handle_s *pmic,
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uint8_t id, uint16_t millivolts)
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{
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const struct regul_struct *regul = ®ul_table[id];
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size_t index;
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uint8_t mask;
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if (!regul->volt_table_size) {
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return RET_SUCCESS;
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}
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mask = regul->volt_table_size - 1U;
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index = voltage_to_index(regul, millivolts);
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if (index == VOLTAGE_INDEX_INVALID) {
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return RET_ERROR_GENERIC;
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}
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return stpmic2_register_update(pmic, regul->volt_cr,
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index << regul->volt_shift,
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mask << regul->volt_shift);
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}
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/* update both normal and alternate register */
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static int stpmic2_update_en_crs(struct pmic_handle_s *pmic, uint8_t id,
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uint8_t value, uint8_t mask)
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{
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const struct regul_struct *regul = ®ul_table[id];
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if (stpmic2_register_update(pmic, regul->en_cr, value, mask) != 0) {
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return RET_ERROR_GENERIC;
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}
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if (stpmic2_register_update(pmic, regul->alt_en_cr, value, mask) != 0) {
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return RET_ERROR_GENERIC;
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}
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return RET_SUCCESS;
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}
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int stpmic2_regulator_get_prop(struct pmic_handle_s *pmic, uint8_t id,
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enum stpmic2_prop_id prop)
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{
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const struct regul_struct *regul = ®ul_table[id];
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uint8_t val;
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VERBOSE("%s: get prop 0x%x\n", regul->name, prop);
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switch (prop) {
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case STPMIC2_BYPASS:
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if ((id <= STPMIC2_BUCK7) || (id == STPMIC2_LDO1) ||
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(id == STPMIC2_LDO4) || (id == STPMIC2_REFDDR)) {
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return 0;
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}
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if (stpmic2_register_read(pmic, regul->en_cr, &val) != 0) {
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return -EIO;
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}
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if ((val & LDO_BYPASS) != 0) {
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return 1;
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}
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break;
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default:
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ERROR("Invalid prop %u\n", prop);
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panic();
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}
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return 0;
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}
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int stpmic2_regulator_set_prop(struct pmic_handle_s *pmic, uint8_t id,
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enum stpmic2_prop_id prop, uint32_t arg)
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{
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const struct regul_struct *regul = ®ul_table[id];
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VERBOSE("%s: set prop 0x%x arg=%u\n", regul->name, prop, arg);
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switch (prop) {
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case STPMIC2_PULL_DOWN:
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return stpmic2_register_update(pmic, regul->pd_reg,
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regul->pd_val,
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regul->pd_val);
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case STPMIC2_MASK_RESET:
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if (!regul->msrt_mask) {
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return RET_ERROR_NOT_SUPPORTED;
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}
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/* enable mask reset */
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return stpmic2_register_update(pmic, regul->msrt_reg,
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regul->msrt_mask,
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regul->msrt_mask);
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case STPMIC2_BYPASS:
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if ((id <= STPMIC2_BUCK7) || (id == STPMIC2_LDO1) ||
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(id == STPMIC2_LDO4) || (id == STPMIC2_REFDDR)) {
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return RET_ERROR_NOT_SUPPORTED;
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}
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/* clear sink source mode */
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if ((id == STPMIC2_LDO3) && (arg != 0U)) {
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if (stpmic2_update_en_crs(pmic, id, 0, LDO3_SNK_SRC) != 0) {
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return RET_ERROR_GENERIC;
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}
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}
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/* enable bypass mode */
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return stpmic2_update_en_crs(pmic, id,
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(arg != 0U) ? LDO_BYPASS : 0,
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LDO_BYPASS);
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case STPMIC2_SINK_SOURCE:
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if (id != STPMIC2_LDO3) {
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return RET_ERROR_NOT_SUPPORTED;
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}
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/* clear bypass mode */
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if (stpmic2_update_en_crs(pmic, id, 0, LDO_BYPASS) != 0) {
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return RET_ERROR_GENERIC;
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}
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return stpmic2_update_en_crs(pmic, id, LDO3_SNK_SRC,
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LDO3_SNK_SRC);
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case STPMIC2_OCP:
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return stpmic2_register_update(pmic, regul->ocp_reg,
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regul->ocp_mask,
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regul->ocp_mask);
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default:
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ERROR("Invalid prop %u\n", prop);
|
|
panic();
|
|
}
|
|
|
|
return -EPERM;
|
|
}
|
|
|
|
#if EVENT_LOG_LEVEL == LOG_LEVEL_VERBOSE
|
|
void stpmic2_dump_regulators(struct pmic_handle_s *pmic)
|
|
{
|
|
size_t i;
|
|
char const *name;
|
|
|
|
for (i = 0U; i < ARRAY_SIZE(regul_table); i++) {
|
|
uint16_t val;
|
|
bool state;
|
|
|
|
if (!regul_table[i].volt_cr) {
|
|
continue;
|
|
}
|
|
|
|
stpmic2_regulator_get_voltage(pmic, i, &val);
|
|
stpmic2_regulator_get_state(pmic, i, &state);
|
|
|
|
name = regul_table[i].name;
|
|
|
|
VERBOSE("PMIC regul %s: %s, %dmV\n",
|
|
name, state ? "EN" : "DIS", val);
|
|
}
|
|
}
|
|
#endif
|
|
|
|
int stpmic2_get_version(struct pmic_handle_s *pmic, uint8_t *val)
|
|
{
|
|
return stpmic2_register_read(pmic, VERSION_SR, val);
|
|
}
|
|
|
|
int stpmic2_get_product_id(struct pmic_handle_s *pmic, uint8_t *val)
|
|
{
|
|
return stpmic2_register_read(pmic, PRODUCT_ID, val);
|
|
}
|