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https://github.com/ARM-software/arm-trusted-firmware.git
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ecf70f7bdb
This patch moves the definition of some macros used only on
ARM platforms from common headers to platform specific headers.
It also forces all ARM standard platforms to have distinct
definitions (even if they are usually the same).
1. `PLAT_ARM_TZC_BASE` and `PLAT_ARM_NSTIMER_FRAME_ID` have been
moved from `css_def.h` to `platform_def.h`.
2. `MHU_BASE` used in CSS platforms is moved from common css_def.h
to platform specific header `platform_def.h` on Juno and
renamed as `PLAT_ARM_MHU_BASE`.
3. To cater for different sizes of BL images, new macros like
`PLAT_ARM_MAX_BL31_SIZE` have been created for each BL image. All
ARM platforms need to define them for each image.
Change-Id: I9255448bddfad734b387922aa9e68d2117338c3f
123 lines
3.6 KiB
C
123 lines
3.6 KiB
C
/*
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* Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch_helpers.h>
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#include <assert.h>
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#include <bakery_lock.h>
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#include <css_def.h>
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#include <mmio.h>
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#include <platform_def.h>
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#include <plat_arm.h>
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#include "css_mhu.h"
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/* SCP MHU secure channel registers */
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#define SCP_INTR_S_STAT 0x200
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#define SCP_INTR_S_SET 0x208
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#define SCP_INTR_S_CLEAR 0x210
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/* CPU MHU secure channel registers */
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#define CPU_INTR_S_STAT 0x300
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#define CPU_INTR_S_SET 0x308
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#define CPU_INTR_S_CLEAR 0x310
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ARM_INSTANTIATE_LOCK
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/* Weak definition may be overridden in specific CSS based platform */
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#pragma weak plat_arm_pwrc_setup
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/*
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* Slot 31 is reserved because the MHU hardware uses this register bit to
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* indicate a non-secure access attempt. The total number of available slots is
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* therefore 31 [30:0].
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*/
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#define MHU_MAX_SLOT_ID 30
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void mhu_secure_message_start(unsigned int slot_id)
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{
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assert(slot_id <= MHU_MAX_SLOT_ID);
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arm_lock_get();
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/* Make sure any previous command has finished */
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while (mmio_read_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_STAT) &
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(1 << slot_id))
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;
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}
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void mhu_secure_message_send(unsigned int slot_id)
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{
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assert(slot_id <= MHU_MAX_SLOT_ID);
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assert(!(mmio_read_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_STAT) &
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(1 << slot_id)));
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/* Send command to SCP */
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mmio_write_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_SET, 1 << slot_id);
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}
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uint32_t mhu_secure_message_wait(void)
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{
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/* Wait for response from SCP */
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uint32_t response;
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while (!(response = mmio_read_32(PLAT_CSS_MHU_BASE + SCP_INTR_S_STAT)))
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;
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return response;
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}
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void mhu_secure_message_end(unsigned int slot_id)
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{
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assert(slot_id <= MHU_MAX_SLOT_ID);
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/*
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* Clear any response we got by writing one in the relevant slot bit to
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* the CLEAR register
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*/
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mmio_write_32(PLAT_CSS_MHU_BASE + SCP_INTR_S_CLEAR, 1 << slot_id);
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arm_lock_release();
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}
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void mhu_secure_init(void)
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{
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arm_lock_init();
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/*
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* The STAT register resets to zero. Ensure it is in the expected state,
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* as a stale or garbage value would make us think it's a message we've
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* already sent.
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*/
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assert(mmio_read_32(PLAT_CSS_MHU_BASE + CPU_INTR_S_STAT) == 0);
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}
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void plat_arm_pwrc_setup(void)
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{
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mhu_secure_init();
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}
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