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https://github.com/ARM-software/arm-trusted-firmware.git
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bbf8f6f95b
The upcoming Firmware Update feature needs transitioning across Secure/Normal worlds to complete the FWU process and hence requires context management code to perform this task. Currently context management code is part of BL31 stage only. This patch moves the code from (include)/bl31 to (include)/common. Some function declarations/definitions and macros have also moved to different files to help code sharing. Change-Id: I3858b08aecdb76d390765ab2b099f457873f7b0c
268 lines
9.9 KiB
C
268 lines
9.9 KiB
C
/*
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* Copyright (c) 2013-2014, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __BL_COMMON_H__
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#define __BL_COMMON_H__
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#define SECURE 0x0
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#define NON_SECURE 0x1
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#define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE))
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#define UP 1
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#define DOWN 0
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/*******************************************************************************
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* Constants to identify the location of a memory region in a given memory
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* layout.
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******************************************************************************/
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#define TOP 0x1
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#define BOTTOM !TOP
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/******************************************************************************
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* Corresponds to the function ID of the only SMC that the BL1 exception
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* handlers service. That's why the chosen value is the first function ID of
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* the ARM SMC64 range.
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*****************************************************************************/
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#define RUN_IMAGE 0xC0000000
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/*******************************************************************************
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* Constants that allow assembler code to access members of and the
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* 'entry_point_info' structure at their correct offsets.
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******************************************************************************/
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#define ENTRY_POINT_INFO_PC_OFFSET 0x08
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#define ENTRY_POINT_INFO_ARGS_OFFSET 0x18
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#define PARAM_EP_SECURITY_MASK 0x1
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#define GET_SECURITY_STATE(x) (x & PARAM_EP_SECURITY_MASK)
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#define SET_SECURITY_STATE(x, security) \
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((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security))
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#define EP_EE_MASK 0x2
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#define EP_EE_LITTLE 0x0
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#define EP_EE_BIG 0x2
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#define EP_GET_EE(x) (x & EP_EE_MASK)
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#define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee))
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#define EP_ST_MASK 0x4
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#define EP_ST_DISABLE 0x0
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#define EP_ST_ENABLE 0x4
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#define EP_GET_ST(x) (x & EP_ST_MASK)
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#define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee))
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#define PARAM_EP 0x01
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#define PARAM_IMAGE_BINARY 0x02
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#define PARAM_BL31 0x03
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#define VERSION_1 0x01
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#define SET_PARAM_HEAD(_p, _type, _ver, _attr) do { \
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(_p)->h.type = (uint8_t)(_type); \
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(_p)->h.version = (uint8_t)(_ver); \
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(_p)->h.size = (uint16_t)sizeof(*_p); \
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(_p)->h.attr = (uint32_t)(_attr) ; \
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} while (0)
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/*******************************************************************************
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* Constants to indicate type of exception to the common exception handler.
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******************************************************************************/
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#define SYNC_EXCEPTION_SP_EL0 0x0
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#define IRQ_SP_EL0 0x1
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#define FIQ_SP_EL0 0x2
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#define SERROR_SP_EL0 0x3
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#define SYNC_EXCEPTION_SP_ELX 0x4
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#define IRQ_SP_ELX 0x5
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#define FIQ_SP_ELX 0x6
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#define SERROR_SP_ELX 0x7
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#define SYNC_EXCEPTION_AARCH64 0x8
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#define IRQ_AARCH64 0x9
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#define FIQ_AARCH64 0xa
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#define SERROR_AARCH64 0xb
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#define SYNC_EXCEPTION_AARCH32 0xc
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#define IRQ_AARCH32 0xd
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#define FIQ_AARCH32 0xe
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#define SERROR_AARCH32 0xf
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#ifndef __ASSEMBLY__
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#include <cdefs.h> /* For __dead2 */
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#include <cassert.h>
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#include <stdint.h>
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#include <stddef.h>
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#define ARRAY_SIZE(a) (sizeof(a) / sizeof((a)[0]))
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/*
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* Declarations of linker defined symbols to help determine memory layout of
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* BL images
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*/
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extern unsigned long __RO_START__;
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extern unsigned long __RO_END__;
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#if IMAGE_BL2
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extern unsigned long __BL2_END__;
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#elif IMAGE_BL31
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extern unsigned long __BL31_END__;
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#elif IMAGE_BL32
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extern unsigned long __BL32_END__;
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#endif /* IMAGE_BLX */
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#if USE_COHERENT_MEM
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extern unsigned long __COHERENT_RAM_START__;
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extern unsigned long __COHERENT_RAM_END__;
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#endif
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/*******************************************************************************
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* Structure used for telling the next BL how much of a particular type of
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* memory is available for its use and how much is already used.
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******************************************************************************/
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typedef struct meminfo {
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uint64_t total_base;
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size_t total_size;
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uint64_t free_base;
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size_t free_size;
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} meminfo_t;
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typedef struct aapcs64_params {
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unsigned long arg0;
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unsigned long arg1;
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unsigned long arg2;
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unsigned long arg3;
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unsigned long arg4;
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unsigned long arg5;
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unsigned long arg6;
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unsigned long arg7;
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} aapcs64_params_t;
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/***************************************************************************
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* This structure provides version information and the size of the
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* structure, attributes for the structure it represents
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***************************************************************************/
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typedef struct param_header {
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uint8_t type; /* type of the structure */
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uint8_t version; /* version of this structure */
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uint16_t size; /* size of this structure in bytes */
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uint32_t attr; /* attributes: unused bits SBZ */
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} param_header_t;
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/*****************************************************************************
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* This structure represents the superset of information needed while
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* switching exception levels. The only two mechanisms to do so are
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* ERET & SMC. Security state is indicated using bit zero of header
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* attribute
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* NOTE: BL1 expects entrypoint followed by spsr while processing
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* SMC to jump to BL31 from the start of entry_point_info
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*****************************************************************************/
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typedef struct entry_point_info {
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param_header_t h;
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uintptr_t pc;
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uint32_t spsr;
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aapcs64_params_t args;
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} entry_point_info_t;
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/*****************************************************************************
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* Image info binary provides information from the image loader that
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* can be used by the firmware to manage available trusted RAM.
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* More advanced firmware image formats can provide additional
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* information that enables optimization or greater flexibility in the
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* common firmware code
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*****************************************************************************/
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typedef struct image_info {
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param_header_t h;
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uintptr_t image_base; /* physical address of base of image */
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uint32_t image_size; /* bytes read from image file */
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} image_info_t;
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/*******************************************************************************
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* This structure represents the superset of information that can be passed to
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* BL31 e.g. while passing control to it from BL2. The BL32 parameters will be
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* populated only if BL2 detects its presence. A pointer to a structure of this
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* type should be passed in X0 to BL3-1's cold boot entrypoint.
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*
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* Use of this structure and the X0 parameter is not mandatory: the BL3-1
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* platform code can use other mechanisms to provide the necessary information
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* about BL3-2 and BL3-3 to the common and SPD code.
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*
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* BL3-1 image information is mandatory if this structure is used. If either of
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* the optional BL3-2 and BL3-3 image information is not provided, this is
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* indicated by the respective image_info pointers being zero.
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******************************************************************************/
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typedef struct bl31_params {
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param_header_t h;
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image_info_t *bl31_image_info;
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entry_point_info_t *bl32_ep_info;
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image_info_t *bl32_image_info;
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entry_point_info_t *bl33_ep_info;
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image_info_t *bl33_image_info;
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} bl31_params_t;
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/*
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* Compile time assertions related to the 'entry_point_info' structure to
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* ensure that the assembler and the compiler view of the offsets of
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* the structure members is the same.
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*/
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CASSERT(ENTRY_POINT_INFO_PC_OFFSET ==
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__builtin_offsetof(entry_point_info_t, pc), \
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assert_BL31_pc_offset_mismatch);
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CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \
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__builtin_offsetof(entry_point_info_t, args), \
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assert_BL31_args_offset_mismatch);
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CASSERT(sizeof(unsigned long) ==
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__builtin_offsetof(entry_point_info_t, spsr) - \
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__builtin_offsetof(entry_point_info_t, pc), \
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assert_entrypoint_and_spsr_should_be_adjacent);
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/*******************************************************************************
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* Function & variable prototypes
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******************************************************************************/
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unsigned long page_align(unsigned long, unsigned);
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unsigned long image_size(unsigned int image_id);
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int load_image(meminfo_t *mem_layout,
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unsigned int image_id,
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uintptr_t image_base,
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image_info_t *image_data,
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entry_point_info_t *entry_point_info);
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int load_auth_image(meminfo_t *mem_layout,
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unsigned int image_name,
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uintptr_t image_base,
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image_info_t *image_data,
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entry_point_info_t *entry_point_info);
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extern const char build_message[];
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extern const char version_string[];
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void reserve_mem(uint64_t *free_base, size_t *free_size,
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uint64_t addr, size_t size);
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void print_entry_point_info(const entry_point_info_t *ep_info);
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#endif /*__ASSEMBLY__*/
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#endif /* __BL_COMMON_H__ */
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