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b92033075a
Conceptually the DT is a hardware description, as such it's independent from the instruction set that a DT client uses. So having separate DTs for aarch32 and aarch64 does not make sense and is not needed. Probably due to historic reasons (a Linux bug fixed in 2016 with Linux commit ba6dea4f7ced, in Linux v4.8) the CPU reg property was using a different size between aarch64 and aarch32, even though the size of it is solely governed by the parent's #address-cells property. Consolidate this to be always 2, and always use two cells to describe the CPU's MPIDR register. This removes the last difference of the -aarch32 versions of the FVP DT files, so just remove all of them. The respective versions without that suffix can now be used with AArch32 DT clients as well. Also remove the respective part in the documentation. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: I45d3a2cbba8e04595a741e1cf41900377952673e |
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| .. | ||
| arm | ||
| marvell | ||
| nxp | ||
| allwinner.rst | ||
| brcm-stingray.rst | ||
| deprecated.rst | ||
| hikey.rst | ||
| hikey960.rst | ||
| imx8.rst | ||
| imx8m.rst | ||
| index.rst | ||
| intel-agilex.rst | ||
| intel-stratix10.rst | ||
| meson-axg.rst | ||
| meson-g12a.rst | ||
| meson-gxbb.rst | ||
| meson-gxl.rst | ||
| mt8183.rst | ||
| mt8186.rst | ||
| mt8188.rst | ||
| mt8192.rst | ||
| mt8195.rst | ||
| nvidia-tegra.rst | ||
| poplar.rst | ||
| qemu-sbsa.rst | ||
| qemu.rst | ||
| qti-msm8916.rst | ||
| qti.rst | ||
| rcar-gen3.rst | ||
| rockchip.rst | ||
| rpi3.rst | ||
| rpi4.rst | ||
| rz-g2.rst | ||
| socionext-uniphier.rst | ||
| stm32mp1.rst | ||
| synquacer.rst | ||
| ti-k3.rst | ||
| warp7.rst | ||
| xilinx-versal-net.rst | ||
| xilinx-versal.rst | ||
| xilinx-zynqmp.rst | ||