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aea4ccf8d9
Cortex-A510 erratum 2684597 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. The workaround is to execute a TSB CSYNC and DSB before executing WFI for power down. SDEN can be found here: https://developer.arm.com/documentation/SDEN1873361/latest https://developer.arm.com/documentation/SDEN1873351/latest Change-Id: Ic0b24b600bc013eb59c797401fbdc9bda8058d6d Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
36 lines
1 KiB
Makefile
36 lines
1 KiB
Makefile
#
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# Copyright (c) 2016-2023, Arm Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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PSCI_LIB_SOURCES := lib/el3_runtime/cpu_data_array.c \
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lib/el3_runtime/${ARCH}/cpu_data.S \
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lib/el3_runtime/${ARCH}/context_mgmt.c \
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lib/cpus/${ARCH}/cpu_helpers.S \
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lib/cpus/errata_report.c \
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lib/locks/exclusive/${ARCH}/spinlock.S \
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lib/psci/psci_off.c \
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lib/psci/psci_on.c \
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lib/psci/psci_suspend.c \
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lib/psci/psci_common.c \
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lib/psci/psci_main.c \
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lib/psci/psci_setup.c \
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lib/psci/psci_system_off.c \
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lib/psci/psci_mem_protect.c \
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lib/psci/${ARCH}/psci_helpers.S
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ifeq (${ARCH}, aarch64)
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PSCI_LIB_SOURCES += lib/el3_runtime/aarch64/context.S \
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lib/cpus/aarch64/runtime_errata.S
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endif
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ifeq (${USE_COHERENT_MEM}, 1)
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PSCI_LIB_SOURCES += lib/locks/bakery/bakery_lock_coherent.c
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else
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PSCI_LIB_SOURCES += lib/locks/bakery/bakery_lock_normal.c
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endif
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ifeq (${ENABLE_PSCI_STAT}, 1)
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PSCI_LIB_SOURCES += lib/psci/psci_stat.c
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endif
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