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1ae75529bc
When a platform decides to use FEAT_RNG_TRAP, every RNDR or RNDRSS read will trap into EL3. The platform can then emulate those instructions, by either executing the real CPU instructions, potentially conditioning the results, or use rate-limiting or filtering to protect the hardware entropy pool. Another possiblitiy would be to use some platform specific TRNG device to get entropy and returning this. To demonstrate platform specific usage, add a demo implementation for the FVP: It will execute the actual CPU instruction and just return the result. This should serve as reference code to implement platform specific policies. We change the definition of read_rndr() and read_rndrrs() to use the alternative sysreg encoding, so that all assemblers can handle that. Add documentation about the new platform specific RNG handler function. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Change-Id: Ibce817b3b06ad20129d15531b81402e3cc3e9a9e
62 lines
1.4 KiB
C
62 lines
1.4 KiB
C
/*
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* Copyright (c) 2022, ARM Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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* This file just contains demonstration code, to "handle" RNG traps.
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*/
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#include <stdbool.h>
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#include <arch.h>
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#include <arch_helpers.h>
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#include <bl31/sync_handle.h>
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#include <context.h>
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/*
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* SCR_EL3.SCR_TRNDR_BIT also affects execution in EL3, so allow to disable
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* the trap temporarily.
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*/
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static void enable_rng_trap(bool enable)
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{
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uint64_t scr_el3 = read_scr_el3();
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if (enable) {
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scr_el3 |= SCR_TRNDR_BIT;
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} else {
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scr_el3 &= ~SCR_TRNDR_BIT;
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}
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write_scr_el3(scr_el3);
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isb();
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}
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/*
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* This emulation code here is not very meaningful: enabling the RNG
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* trap typically happens for a reason, so just calling the actual
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* hardware instructions might not be useful or even possible.
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*/
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int plat_handle_rng_trap(uint64_t esr_el3, cpu_context_t *ctx)
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{
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/* extract the target register number from the exception syndrome */
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unsigned int rt = get_sysreg_iss_rt(esr_el3);
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/* ignore XZR accesses and writes to the register */
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if (rt == 31 || is_sysreg_iss_write(esr_el3)) {
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return TRAP_RET_CONTINUE;
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}
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enable_rng_trap(false);
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if ((esr_el3 & ISS_SYSREG_OPCODE_MASK) == ISS_SYSREG_OPCODE_RNDR) {
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ctx->gpregs_ctx.ctx_regs[rt] = read_rndr();
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} else {
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ctx->gpregs_ctx.ctx_regs[rt] = read_rndrrs();
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}
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enable_rng_trap(true);
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/*
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* We successfully handled the trap, continue with the next
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* instruction.
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*/
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return TRAP_RET_CONTINUE;
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}
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