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Subsequent patches will provide a solution to do the BL2 hash measurement and recording in BL1 itself, hence in preparation to adopt that solution remove the logic of passing BL2 hash measurement to BL2 component via TB_FW config. Change-Id: Iff9b3d4c6a236a33b942898fcdf799cbab89b724 Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>
89 lines
2.4 KiB
C
89 lines
2.4 KiB
C
/*
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* Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <errno.h>
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#include <bl1/bl1.h>
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#include <common/tbbr/tbbr_img_def.h>
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#include <drivers/arm/smmu_v3.h>
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#include <drivers/arm/sp805.h>
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#include <lib/mmio.h>
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#include <plat/arm/common/arm_config.h>
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#include <plat/arm/common/plat_arm.h>
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#include <plat/arm/common/arm_def.h>
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#include <plat/common/platform.h>
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#include "fvp_private.h"
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/*******************************************************************************
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* Perform any BL1 specific platform actions.
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******************************************************************************/
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void bl1_early_platform_setup(void)
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{
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arm_bl1_early_platform_setup();
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/* Initialize the platform config for future decision making */
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fvp_config_setup();
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/*
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* Initialize Interconnect for this cluster during cold boot.
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* No need for locks as no other CPU is active.
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*/
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fvp_interconnect_init();
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/*
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* Enable coherency in Interconnect for the primary CPU's cluster.
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*/
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fvp_interconnect_enable();
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}
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void plat_arm_secure_wdt_start(void)
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{
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sp805_start(ARM_SP805_TWDG_BASE, ARM_TWDG_LOAD_VAL);
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}
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void plat_arm_secure_wdt_stop(void)
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{
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sp805_stop(ARM_SP805_TWDG_BASE);
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}
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void bl1_platform_setup(void)
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{
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arm_bl1_platform_setup();
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/* Initialize System level generic or SP804 timer */
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fvp_timer_init();
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/* On FVP RevC, initialize SMMUv3 */
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if ((arm_config.flags & ARM_CONFIG_FVP_HAS_SMMUV3) != 0U)
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smmuv3_security_init(PLAT_FVP_SMMUV3_BASE);
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}
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__dead2 void bl1_plat_fwu_done(void *client_cookie, void *reserved)
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{
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uint32_t nv_flags = mmio_read_32(V2M_SYS_NVFLAGS_ADDR);
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/* Clear the NV flags register. */
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mmio_write_32((V2M_SYSREGS_BASE + V2M_SYS_NVFLAGSCLR),
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nv_flags);
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/* Setup the watchdog to reset the system as soon as possible */
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sp805_refresh(ARM_SP805_TWDG_BASE, 1U);
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while (true)
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wfi();
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}
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/*******************************************************************************
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* The following function checks if Firmware update is needed by checking error
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* reported in NV flag.
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******************************************************************************/
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bool plat_arm_bl1_fwu_needed(void)
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{
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int32_t nv_flags = (int32_t)mmio_read_32(V2M_SYS_NVFLAGS_ADDR);
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/* if image load/authentication failed */
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return ((nv_flags == -EAUTH) || (nv_flags == -ENOENT));
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}
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