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https://github.com/ARM-software/arm-trusted-firmware.git
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f3ccf036ec
This patch fixes the bug when AMUv1 group1 counters was always assumed being implemented without checking for its presence which was causing exception otherwise. The AMU extension code was also modified as listed below: - Added detection of AMUv1 for ARMv8.6 - 'PLAT_AMU_GROUP1_NR_COUNTERS' build option is removed and number of group1 counters 'AMU_GROUP1_NR_COUNTERS' is now calculated based on 'AMU_GROUP1_COUNTERS_MASK' value - Added bit fields definitions and access functions for AMCFGR_EL0/AMCFGR and AMCGCR_EL0/AMCGCR registers - Unification of amu.c Aarch64 and Aarch32 source files - Bug fixes and TF-A coding style compliant changes. Change-Id: I14e407be62c3026ebc674ec7045e240ccb71e1fb Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
91 lines
2.6 KiB
C
91 lines
2.6 KiB
C
/*
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* Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef AMU_H
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#define AMU_H
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#include <stdbool.h>
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#include <stdint.h>
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#include <lib/cassert.h>
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#include <lib/utils_def.h>
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#include <platform_def.h>
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/* All group 0 counters */
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#define AMU_GROUP0_COUNTERS_MASK U(0xf)
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#define AMU_GROUP0_NR_COUNTERS U(4)
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#ifdef PLAT_AMU_GROUP1_COUNTERS_MASK
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#define AMU_GROUP1_COUNTERS_MASK PLAT_AMU_GROUP1_COUNTERS_MASK
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#else
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#define AMU_GROUP1_COUNTERS_MASK U(0)
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#endif
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/* Calculate number of group 1 counters */
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#if (AMU_GROUP1_COUNTERS_MASK & (1 << 15))
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#define AMU_GROUP1_NR_COUNTERS 16U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 14))
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#define AMU_GROUP1_NR_COUNTERS 15U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 13))
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#define AMU_GROUP1_NR_COUNTERS 14U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 12))
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#define AMU_GROUP1_NR_COUNTERS 13U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 11))
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#define AMU_GROUP1_NR_COUNTERS 12U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 10))
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#define AMU_GROUP1_NR_COUNTERS 11U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 9))
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#define AMU_GROUP1_NR_COUNTERS 10U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 8))
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#define AMU_GROUP1_NR_COUNTERS 9U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 7))
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#define AMU_GROUP1_NR_COUNTERS 8U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 6))
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#define AMU_GROUP1_NR_COUNTERS 7U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 5))
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#define AMU_GROUP1_NR_COUNTERS 6U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 4))
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#define AMU_GROUP1_NR_COUNTERS 5U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 3))
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#define AMU_GROUP1_NR_COUNTERS 4U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 2))
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#define AMU_GROUP1_NR_COUNTERS 3U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 1))
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#define AMU_GROUP1_NR_COUNTERS 2U
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#elif (AMU_GROUP1_COUNTERS_MASK & (1 << 0))
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#define AMU_GROUP1_NR_COUNTERS 1U
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#else
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#define AMU_GROUP1_NR_COUNTERS 0U
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#endif
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CASSERT(AMU_GROUP1_COUNTERS_MASK <= 0xffff, invalid_amu_group1_counters_mask);
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struct amu_ctx {
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uint64_t group0_cnts[AMU_GROUP0_NR_COUNTERS];
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#if AMU_GROUP1_NR_COUNTERS
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uint64_t group1_cnts[AMU_GROUP1_NR_COUNTERS];
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#endif
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};
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bool amu_supported(void);
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void amu_enable(bool el2_unused);
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/* Group 0 configuration helpers */
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uint64_t amu_group0_cnt_read(unsigned int idx);
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void amu_group0_cnt_write(unsigned int idx, uint64_t val);
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#if AMU_GROUP1_NR_COUNTERS
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bool amu_group1_supported(void);
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/* Group 1 configuration helpers */
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uint64_t amu_group1_cnt_read(unsigned int idx);
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void amu_group1_cnt_write(unsigned int idx, uint64_t val);
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void amu_group1_set_evtype(unsigned int idx, unsigned int val);
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#endif
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#endif /* AMU_H */
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