Olivier Deprez b2d851785f fix: pass SMCCCv1.3 SVE hint to internal flags ... This change fixes the initial support for SMCCCv1.3 SVE hint bit [1]. In the aarch64 smc handler, the FID[16] bit is improperly extracted and results in the corresponding flags bit to be always set. Fix by doing the proper masking and set into the flags register. [1] https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/17511 Signed-off-by: Olivier Deprez <olivier.deprez@arm.com> Change-Id: I62b8e211d48a50f28e184ff27cd718f51d8d56bf		2023-06-16 15:03:36 +02:00
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aarch64	fix: pass SMCCCv1.3 SVE hint to internal flags	2023-06-16 15:03:36 +02:00
bl31.ld.S	chore(bl): add UNALIGNED symbols for TEXT/RODATA	2023-06-12 12:50:08 +02:00
bl31.mk	Merge changes from topic "srm/Errata_ABI_El3" into integration	2023-05-09 21:15:54 +02:00
bl31_context_mgmt.c	feat(rme): add context management changes for FEAT_RME	2021-10-05 18:41:35 +02:00
bl31_main.c	refactor(context-mgmt): move FEAT_HCX save/restore into C	2023-01-11 16:02:58 +00:00
bl31_traps.c	feat(el3-runtime): handle traps for IMPDEF registers accesses	2023-04-30 11:04:59 +01:00
ehf.c	fix(bl31): allow use of EHF with S-EL2 SPMC	2022-08-30 08:29:25 -07:00
interrupt_mgmt.c	Use correct type when reading SCR register	2020-01-28 11:10:48 +00:00