johpow01 dc78e62d80 feat(sme): enable SME functionality ... This patch adds two new compile time options to enable SME in TF-A: ENABLE_SME_FOR_NS and ENABLE_SME_FOR_SWD for use in non-secure and secure worlds respectively. Setting ENABLE_SME_FOR_NS=1 will enable SME for non-secure worlds and trap SME, SVE, and FPU/SIMD instructions in secure context. Setting ENABLE_SME_FOR_SWD=1 will disable these traps, but support for SME context management does not yet exist in SPM so building with SPD=spmd will fail. The existing ENABLE_SVE_FOR_NS and ENABLE_SVE_FOR_SWD options cannot be used with SME as it is a superset of SVE and will enable SVE and FPU/SIMD along with SME. Signed-off-by: John Powell <john.powell@arm.com> Change-Id: Iaaac9d22fe37b4a92315207891da848a8fd0ed73		2021-11-12 10:38:00 -06:00
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aarch32	feat(trf): enable trace filter control register access from lower NS EL	2021-08-26 09:32:35 +01:00
aarch64	feat(sme): enable SME functionality	2021-11-12 10:38:00 -06:00
cpu_data_array.c	Sanitise includes across codebase	2019-01-04 10:43:17 +00:00