Antonio Nino Diaz af6491f85c tzc: Fix MISRA defects ... The definitions FAIL_CONTROL_*_SHIFT were incorrect, they have been fixed. The types tzc_region_attributes_t and tzc_action_t have been removed and replaced by unsigned int because it is not allowed to do logical operations on enums. Also, fix some address definitions in arm_def.h. Change-Id: Id37941d76883f9fe5045a5f0a4224c133c504d8b Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>		2018-10-23 12:12:03 +01:00
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cci	Mark GICV3, CCI and CCN boot time code as init	2018-10-03 11:48:15 +01:00
ccn	Mark GICV3, CCI and CCN boot time code as init	2018-10-03 11:48:15 +01:00
gic	Mark GICV3, CCI and CCN boot time code as init	2018-10-03 11:48:15 +01:00
pl011	pl011: cnds: cbmem: 16550: Fix comments	2018-10-12 14:47:41 +01:00
pl061	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
smmu	Mark GICV3, CCI and CCN boot time code as init	2018-10-03 11:48:15 +01:00
sp804	Use SPDX license identifiers	2017-05-03 09:39:28 +01:00
sp805	Fix MISRA defects in SP805 driver	2018-07-30 09:30:15 +01:00
tzc	tzc: Fix MISRA defects	2018-10-23 12:12:03 +01:00