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This feature is enabled by default using STM32MP_DDR_FIP_IO_STORAGE. DDR firmware binary is loaded from FIP to SRAM1 which needs to be mapped. Only half of the SRAM1 will be allocated to TF-A. RISAB3 has to be configured to allow access to SRAM1. Add image ID and update maximum number on platform side also. Fill related descriptor information, add policy and update numbers. DDR_TYPE variable is used to identify binary file, and image is now added in the fiptool command line. The DDR PHY firmware is not in TF-A repository. It can be found at https://github.com/STMicroelectronics/stm32-ddr-phy-binary To ease the selection of the firmware path, STM32MP_DDR_FW_PATH is added to platform.mk file. Change-Id: I09ab0a5c63406055a7b5ccd16d65e443de47ca2f Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com> Signed-off-by: Yann Gautier <yann.gautier@st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
201 lines
5.7 KiB
C
201 lines
5.7 KiB
C
/*
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* Copyright (c) 2021-2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <common/debug.h>
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#include <common/fdt_wrappers.h>
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#include <drivers/io/io_storage.h>
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#include <drivers/mmc.h>
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#include <lib/fconf/fconf.h>
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#include <lib/object_pool.h>
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#include <libfdt.h>
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#include <tools_share/firmware_image_package.h>
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#include <platform_def.h>
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#include <stm32mp_efi.h>
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#include <stm32mp_fconf_getter.h>
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#include <stm32mp_io_storage.h>
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#if STM32MP_SDMMC || STM32MP_EMMC
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static io_block_spec_t gpt_block_spec = {
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.offset = 0U,
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.length = 34U * MMC_BLOCK_SIZE, /* Size of GPT table */
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};
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#endif
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#if PSA_FWU_SUPPORT
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static io_block_spec_t metadata_block_spec = {
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.offset = 0, /* To be filled at runtime */
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.length = 0, /* To be filled at runtime */
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};
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#endif /* PSA_FWU_SUPPORT */
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/* By default, STM32 platforms load images from the FIP */
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struct plat_io_policy policies[MAX_NUMBER_IDS] = {
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[FIP_IMAGE_ID] = {
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.dev_handle = &storage_dev_handle,
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.image_spec = (uintptr_t)&image_block_spec,
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.img_type_guid = STM32MP_FIP_GUID,
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.check = open_storage
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},
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#ifndef DECRYPTION_SUPPORT_none
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[ENC_IMAGE_ID] = {
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.dev_handle = &fip_dev_handle,
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.image_spec = (uintptr_t)NULL,
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.img_type_guid = NULL_GUID,
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.check = open_fip
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},
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#endif
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#if STM32MP_SDMMC || STM32MP_EMMC
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[GPT_IMAGE_ID] = {
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.dev_handle = &storage_dev_handle,
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.image_spec = (uintptr_t)&gpt_block_spec,
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.img_type_guid = NULL_GUID,
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.check = open_storage
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},
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#endif
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#if PSA_FWU_SUPPORT
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[FWU_METADATA_IMAGE_ID] = {
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.dev_handle = &storage_dev_handle,
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.image_spec = (uintptr_t)&metadata_block_spec,
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.img_type_guid = NULL_GUID,
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.check = open_storage
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},
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[BKUP_FWU_METADATA_IMAGE_ID] = {
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.dev_handle = &storage_dev_handle,
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.image_spec = (uintptr_t)&metadata_block_spec,
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.img_type_guid = NULL_GUID,
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.check = open_storage
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},
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#endif /* PSA_FWU_SUPPORT */
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};
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#define DEFAULT_UUID_NUMBER U(7)
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#ifdef __aarch64__
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#define BL31_UUID_NUMBER U(1)
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#else
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#define BL31_UUID_NUMBER U(0)
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#endif
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#if TRUSTED_BOARD_BOOT
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#define TBBR_UUID_NUMBER U(6)
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#else
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#define TBBR_UUID_NUMBER U(0)
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#endif
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#if STM32MP_DDR_FIP_IO_STORAGE
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#define DDR_FW_UUID_NUMBER U(1)
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#else
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#define DDR_FW_UUID_NUMBER U(0)
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#endif
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#define FCONF_ST_IO_UUID_NUMBER (DEFAULT_UUID_NUMBER + \
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BL31_UUID_NUMBER + \
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TBBR_UUID_NUMBER + \
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DDR_FW_UUID_NUMBER)
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static io_uuid_spec_t fconf_stm32mp_uuids[FCONF_ST_IO_UUID_NUMBER];
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static OBJECT_POOL_ARRAY(fconf_stm32mp_uuids_pool, fconf_stm32mp_uuids);
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struct policies_load_info {
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unsigned int image_id;
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const char *name;
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};
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/* image id to property name table */
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static const struct policies_load_info load_info[FCONF_ST_IO_UUID_NUMBER] = {
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#if STM32MP_DDR_FIP_IO_STORAGE
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{DDR_FW_ID, "ddr_fw_uuid"},
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#endif
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{FW_CONFIG_ID, "fw_cfg_uuid"},
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#ifdef __aarch64__
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{BL31_IMAGE_ID, "bl31_uuid"},
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#endif
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{BL32_IMAGE_ID, "bl32_uuid"},
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{BL32_EXTRA1_IMAGE_ID, "bl32_extra1_uuid"},
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{BL32_EXTRA2_IMAGE_ID, "bl32_extra2_uuid"},
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{BL33_IMAGE_ID, "bl33_uuid"},
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{HW_CONFIG_ID, "hw_cfg_uuid"},
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{TOS_FW_CONFIG_ID, "tos_fw_cfg_uuid"},
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#if TRUSTED_BOARD_BOOT
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{STM32MP_CONFIG_CERT_ID, "stm32mp_cfg_cert_uuid"},
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{TRUSTED_KEY_CERT_ID, "t_key_cert_uuid"},
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{TRUSTED_OS_FW_KEY_CERT_ID, "tos_fw_key_cert_uuid"},
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{NON_TRUSTED_FW_KEY_CERT_ID, "nt_fw_key_cert_uuid"},
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{TRUSTED_OS_FW_CONTENT_CERT_ID, "tos_fw_content_cert_uuid"},
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{NON_TRUSTED_FW_CONTENT_CERT_ID, "nt_fw_content_cert_uuid"},
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#endif /* TRUSTED_BOARD_BOOT */
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};
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int fconf_populate_stm32mp_io_policies(uintptr_t config)
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{
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int node;
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unsigned int i;
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/* As libfdt uses void *, we can't avoid this cast */
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const void *dtb = (void *)config;
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/* Assert the node offset point to "st,io-fip-handle" compatible property */
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const char *compatible_str = "st,io-fip-handle";
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node = fdt_node_offset_by_compatible(dtb, -1, compatible_str);
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if (node < 0) {
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ERROR("FCONF: Can't find %s compatible in dtb\n", compatible_str);
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return node;
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}
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/* Locate the uuid cells and read the value for all the load info uuid */
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for (i = 0U; i < FCONF_ST_IO_UUID_NUMBER; i++) {
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union uuid_helper_t uuid_helper;
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io_uuid_spec_t *uuid_ptr;
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int err;
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uuid_ptr = pool_alloc(&fconf_stm32mp_uuids_pool);
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err = fdtw_read_uuid(dtb, node, load_info[i].name, 16,
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(uint8_t *)&uuid_helper);
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if (err < 0) {
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WARN("FCONF: Read cell failed for %s\n", load_info[i].name);
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return err;
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}
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VERBOSE("FCONF: stm32mp-io_policies.%s cell found with value = "
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"%02x%02x%02x%02x-%02x%02x-%02x%02x-%02x%02x-%02x%02x%02x%02x%02x%02x\n",
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load_info[i].name,
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uuid_helper.uuid_struct.time_low[0], uuid_helper.uuid_struct.time_low[1],
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uuid_helper.uuid_struct.time_low[2], uuid_helper.uuid_struct.time_low[3],
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uuid_helper.uuid_struct.time_mid[0], uuid_helper.uuid_struct.time_mid[1],
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uuid_helper.uuid_struct.time_hi_and_version[0],
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uuid_helper.uuid_struct.time_hi_and_version[1],
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uuid_helper.uuid_struct.clock_seq_hi_and_reserved,
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uuid_helper.uuid_struct.clock_seq_low,
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uuid_helper.uuid_struct.node[0], uuid_helper.uuid_struct.node[1],
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uuid_helper.uuid_struct.node[2], uuid_helper.uuid_struct.node[3],
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uuid_helper.uuid_struct.node[4], uuid_helper.uuid_struct.node[5]);
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uuid_ptr->uuid = uuid_helper.uuid_struct;
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policies[load_info[i].image_id].image_spec = (uintptr_t)uuid_ptr;
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switch (load_info[i].image_id) {
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#if ENCRYPT_BL32 && !defined(DECRYPTION_SUPPORT_none)
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case BL32_IMAGE_ID:
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case BL32_EXTRA1_IMAGE_ID:
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case BL32_EXTRA2_IMAGE_ID:
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policies[load_info[i].image_id].dev_handle = &enc_dev_handle;
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policies[load_info[i].image_id].check = open_enc_fip;
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break;
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#endif
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default:
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policies[load_info[i].image_id].dev_handle = &fip_dev_handle;
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policies[load_info[i].image_id].check = open_fip;
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break;
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}
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}
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return 0;
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}
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FCONF_REGISTER_POPULATOR(TB_FW, stm32mp_io, fconf_populate_stm32mp_io_policies);
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