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adf73ae20a
Add SPMI and PMIF driver for PMIC communication Change-Id: Iad1d90381d6dad6b3e92fd9d6a3ce02fa11d15f1 Signed-off-by: Hope Wang <hope.wang@mediatek.corp-partner.google.com>
290 lines
7.9 KiB
C
290 lines
7.9 KiB
C
/*
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* Copyright (c) 2025, Mediatek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <lib/utils_def.h>
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#include <drivers/spmi/pmif_common.h>
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#include <drivers/spmi/pmif_v1/pmif.h>
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#include <drivers/spmi/spmi_common.h>
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#include <drivers/spmi/spmi_sw.h>
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#include <drivers/spmi_api.h>
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#include <lib/mtk_init/mtk_init.h>
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#include <mtk_mmap_pool.h>
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#define SPMI_GROUP_ID 0xB
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#define SPMI_DEBUG 0
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static const mmap_region_t pmif_spmi_mmap[] MTK_MMAP_SECTION = {
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MAP_REGION_FLAT(PMIF_SPMI_M_BASE, PMIF_SPMI_SIZE,
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MT_DEVICE | MT_RW | MT_NS),
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MAP_REGION_FLAT(SPMI_MST_M_BASE, SPMI_MST_SIZE,
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MT_DEVICE | MT_RW | MT_SECURE),
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MAP_REGION_FLAT(PMIF_SPMI_P_BASE, PMIF_SPMI_SIZE,
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MT_DEVICE | MT_RW | MT_NS),
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{0}
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};
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DECLARE_MTK_MMAP_REGIONS(pmif_spmi_mmap);
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static uint16_t mt6xxx_spmi_regs[] = {
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[SPMI_OP_ST_CTRL] = 0x0000,
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[SPMI_GRP_ID_EN] = 0x0004,
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[SPMI_OP_ST_STA] = 0x0008,
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[SPMI_MST_SAMPL] = 0x000C,
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[SPMI_MST_REQ_EN] = 0x0010,
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[SPMI_RCS_CTRL] = 0x0014,
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[SPMI_SLV_3_0_EINT] = 0x0020,
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[SPMI_SLV_7_4_EINT] = 0x0024,
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[SPMI_SLV_B_8_EINT] = 0x0028,
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[SPMI_SLV_F_C_EINT] = 0x002C,
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[SPMI_REC_CTRL] = 0x0040,
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[SPMI_REC0] = 0x0044,
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[SPMI_REC1] = 0x0048,
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[SPMI_REC2] = 0x004C,
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[SPMI_REC3] = 0x0050,
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[SPMI_REC4] = 0x0054,
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[SPMI_REC_CMD_DEC] = 0x005C,
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[SPMI_DEC_DBG] = 0x00F8,
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[SPMI_MST_DBG] = 0x00FC,
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};
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static uint16_t mt6xxx_regs[] = {
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[PMIF_INIT_DONE] = 0x0000,
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[PMIF_INF_EN] = 0x0024,
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[PMIF_ARB_EN] = 0x0150,
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[PMIF_IRQ_EVENT_EN_0] = 0x0420,
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[PMIF_IRQ_FLAG_0] = 0x0428,
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[PMIF_IRQ_CLR_0] = 0x042C,
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[PMIF_IRQ_EVENT_EN_2] = 0x0440,
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[PMIF_IRQ_FLAG_2] = 0x0448,
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[PMIF_IRQ_CLR_2] = 0x044C,
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[PMIF_WDT_CTRL] = 0x0470,
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[PMIF_WDT_EVENT_EN_1] = 0x047C,
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[PMIF_WDT_FLAG_1] = 0x0480,
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[PMIF_SWINF_2_ACC] = 0x0880,
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[PMIF_SWINF_2_WDATA_31_0] = 0x0884,
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[PMIF_SWINF_2_WDATA_63_32] = 0x0888,
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[PMIF_SWINF_2_RDATA_31_0] = 0x0894,
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[PMIF_SWINF_2_RDATA_63_32] = 0x0898,
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[PMIF_SWINF_2_VLD_CLR] = 0x08A4,
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[PMIF_SWINF_2_STA] = 0x08A8,
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[PMIF_SWINF_3_ACC] = 0x08C0,
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[PMIF_SWINF_3_WDATA_31_0] = 0x08C4,
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[PMIF_SWINF_3_WDATA_63_32] = 0x08C8,
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[PMIF_SWINF_3_RDATA_31_0] = 0x08D4,
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[PMIF_SWINF_3_RDATA_63_32] = 0x08D8,
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[PMIF_SWINF_3_VLD_CLR] = 0x08E4,
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[PMIF_SWINF_3_STA] = 0x08E8,
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/* hw mpu */
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[PMIF_PMIC_ALL_RGN_EN_1] = 0x09B0,
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[PMIF_PMIC_ALL_RGN_EN_2] = 0x0D30,
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[PMIF_PMIC_ALL_RGN_0_START] = 0x09B4,
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[PMIF_PMIC_ALL_RGN_0_END] = 0x09B8,
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[PMIF_PMIC_ALL_RGN_1_START] = 0x09BC,
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[PMIF_PMIC_ALL_RGN_1_END] = 0x09C0,
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[PMIF_PMIC_ALL_RGN_2_START] = 0x09C4,
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[PMIF_PMIC_ALL_RGN_2_END] = 0x09C8,
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[PMIF_PMIC_ALL_RGN_3_START] = 0x09CC,
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[PMIF_PMIC_ALL_RGN_3_END] = 0x09D0,
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[PMIF_PMIC_ALL_RGN_31_START] = 0x0D34,
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[PMIF_PMIC_ALL_RGN_31_END] = 0x0D38,
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[PMIF_PMIC_ALL_INVLD_SLVID] = 0x0AAC,
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[PMIF_PMIC_ALL_RGN_0_PER0] = 0x0AB0,
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[PMIF_PMIC_ALL_RGN_0_PER1] = 0x0AB4,
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[PMIF_PMIC_ALL_RGN_1_PER0] = 0x0AB8,
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[PMIF_PMIC_ALL_RGN_2_PER0] = 0x0AC0,
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[PMIF_PMIC_ALL_RGN_3_PER0] = 0x0AC8,
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[PMIF_PMIC_ALL_RGN_31_PER0] = 0x0DB4,
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[PMIF_PMIC_ALL_RGN_31_PER1] = 0x0DB8,
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[PMIF_PMIC_ALL_RGN_OTHERS_PER0] = 0x0BA8,
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[PMIF_PMIC_ALL_RGN_OTHERS_PER1] = 0x0BAC,
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};
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struct pmif pmif_spmi_arb[] = {
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{
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.base = (void *)PMIF_SPMI_M_BASE,
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.regs = mt6xxx_regs,
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.spmimst_base = (void *)SPMI_MST_M_BASE,
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.spmimst_regs = mt6xxx_spmi_regs,
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.mstid = SPMI_MASTER_0,
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.read_cmd = pmif_spmi_read_cmd,
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.write_cmd = pmif_spmi_write_cmd,
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}, {
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.base = (void *)PMIF_SPMI_M_BASE,
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.regs = mt6xxx_regs,
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.spmimst_base = (void *)SPMI_MST_M_BASE,
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.spmimst_regs = mt6xxx_spmi_regs,
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.mstid = SPMI_MASTER_1,
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.read_cmd = pmif_spmi_read_cmd,
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.write_cmd = pmif_spmi_write_cmd,
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}, {
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.base = (void *)PMIF_SPMI_P_BASE,
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.regs = mt6xxx_regs,
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.spmimst_base = (void *)SPMI_MST_P_BASE,
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.spmimst_regs = mt6xxx_spmi_regs,
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.mstid = SPMI_MASTER_P_1,
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.read_cmd = pmif_spmi_read_cmd,
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.write_cmd = pmif_spmi_write_cmd,
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},
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};
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static struct spmi_device spmi_dev[] = {
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{
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.slvid = SPMI_SLAVE_4,
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.grpiden = 0x1 << SPMI_GROUP_ID,
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.mstid = SPMI_MASTER_1,
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.hwcid_addr = 0x09,
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.hwcid_val = 0x63,
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.swcid_addr = 0x0B,
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.swcid_val = 0x63,
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.wpk_key_addr = 0x3A7,
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.wpk_key_val = 0x9C,
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.wpk_key_h_val = 0x9C,
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.tma_key_addr = 0x39E,
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.tma_key_val = 0x9C,
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.tma_key_h_val = 0x9C,
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.pmif_arb = &pmif_spmi_arb[SPMI_MASTER_1],
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}, {
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.slvid = SPMI_SLAVE_9,
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.grpiden = 0x1 << SPMI_GROUP_ID,
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.mstid = SPMI_MASTER_1,
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.hwcid_addr = 0x09,
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.hwcid_val = 0x85,
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.swcid_addr = 0x0B,
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.swcid_val = 0x85,
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.wpk_key_addr = 0x3AA,
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.wpk_key_val = 0x30,
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.wpk_key_h_val = 0x63,
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.tma_key_addr = 0x39E,
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.tma_key_val = 0x7A,
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.tma_key_h_val = 0x99,
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.pmif_arb = &pmif_spmi_arb[SPMI_MASTER_1],
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}, {
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.slvid = SPMI_SLAVE_5,
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.grpiden = 0x800,
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.mstid = SPMI_MASTER_1,/* spmi-m */
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.hwcid_addr = 0x09,
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.hwcid_val = 0x73,
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.swcid_addr = 0x0B,
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.swcid_val = 0x73,
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.wpk_key_addr = 0x3A7,
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.wpk_key_val = 0x8C,
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.wpk_key_h_val = 0x9C,
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.tma_key_addr = 0x39E,
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.tma_key_val = 0x8C,
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.tma_key_h_val = 0x9C,
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.pmif_arb = &pmif_spmi_arb[SPMI_MASTER_1],
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}, {
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.slvid = SPMI_SLAVE_14, /* MT6379 */
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.grpiden = 0x800,
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.mstid = SPMI_MASTER_1,/* spmi-m */
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.hwcid_addr = 0x00,
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.hwcid_val = 0x70,
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.hwcid_mask = 0xF0,
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.pmif_arb = &pmif_spmi_arb[SPMI_MASTER_1],
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}, {
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.slvid = SPMI_SLAVE_6, /* MT6316 */
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.grpiden = 0x800,
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.mstid = SPMI_MASTER_P_1,/* spmi-m */
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.hwcid_addr = 0x209,
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.hwcid_val = 0x16,
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.swcid_addr = 0x20B,
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.swcid_val = 0x16,
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.wpk_key_addr = 0x3B1,
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.wpk_key_val = 0xE9,
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.wpk_key_h_val = 0xE6,
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.tma_key_addr = 0x3A8,
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.tma_key_val = 0xE9,
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.tma_key_h_val = 0xE6,
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.pmif_arb = &pmif_spmi_arb[SPMI_MASTER_P_1],
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}, {
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.slvid = SPMI_SLAVE_7,
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.grpiden = 0x800,
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.mstid = SPMI_MASTER_P_1,/* spmi-m */
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.hwcid_addr = 0x209,
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.hwcid_val = 0x16,
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.swcid_addr = 0x20B,
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.swcid_val = 0x16,
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.wpk_key_addr = 0x3B1,
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.wpk_key_val = 0xE9,
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.wpk_key_h_val = 0xE6,
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.tma_key_addr = 0x3A8,
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.tma_key_val = 0xE9,
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.tma_key_h_val = 0xE6,
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.pmif_arb = &pmif_spmi_arb[SPMI_MASTER_P_1],
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}, {
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.slvid = SPMI_SLAVE_8,
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.grpiden = 0x800,
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.mstid = SPMI_MASTER_P_1,/* spmi-m */
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.hwcid_addr = 0x209,
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.hwcid_val = 0x16,
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.swcid_addr = 0x20B,
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.swcid_val = 0x16,
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.wpk_key_addr = 0x3B1,
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.wpk_key_val = 0xE9,
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.wpk_key_h_val = 0xE6,
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.tma_key_addr = 0x3A8,
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.tma_key_val = 0xE9,
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.tma_key_h_val = 0xE6,
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.pmif_arb = &pmif_spmi_arb[SPMI_MASTER_P_1],
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}, {
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.slvid = SPMI_SLAVE_15,
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.grpiden = 0x800,
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.mstid = SPMI_MASTER_P_1,/* spmi-m */
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.hwcid_addr = 0x209,
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.hwcid_val = 0x16,
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.swcid_addr = 0x20B,
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.swcid_val = 0x16,
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.wpk_key_addr = 0x3B1,
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.wpk_key_val = 0xE9,
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.wpk_key_h_val = 0xE6,
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.tma_key_addr = 0x3A8,
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.tma_key_val = 0xE9,
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.tma_key_h_val = 0xE6,
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.pmif_arb = &pmif_spmi_arb[SPMI_MASTER_P_1],
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},
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};
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#if SPMI_DEBUG
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static void spmi_read_check(struct spmi_device *dev)
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{
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uint8_t rdata = 0;
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spmi_ext_register_readl(dev, dev->hwcid_addr, &rdata, 1);
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if (dev->hwcid_mask) {
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if ((rdata & dev->hwcid_mask) == (dev->hwcid_val & dev->hwcid_mask))
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SPMI_INFO("%s pass, slvid:%d rdata = 0x%x\n", __func__,
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dev->slvid, rdata);
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else
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SPMI_ERR("%s fail, slvid:%d rdata = 0x%x\n", __func__,
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dev->slvid, rdata);
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} else {
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if (rdata == dev->hwcid_val)
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SPMI_INFO("%s pass, slvid:%d rdata = 0x%x\n", __func__,
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dev->slvid, rdata);
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else
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SPMI_ERR("%s fail, slvid:%d rdata = 0x%x\n", __func__,
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dev->slvid, rdata);
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}
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}
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void spmi_test(void)
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{
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for (int k = 0; k < ARRAY_SIZE(spmi_dev); k++)
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spmi_read_check(&spmi_dev[k]);
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}
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#endif
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int platform_pmif_spmi_init(void)
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{
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spmi_device_register(spmi_dev, ARRAY_SIZE(spmi_dev));
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#if SPMI_DEBUG
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spmi_test();
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#endif
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return 0;
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}
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MTK_ARCH_INIT(platform_pmif_spmi_init);
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