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aceb9c9e54
The workarounds for these below mentioned errata are not implemented in EL3, but the flags can be enabled/disabled at a platform level based on arm/non-arm interconnect IP flag. The ABI helps assist the Kernel in the process of mitigation for the following errata: Cortex-A715: erratum 2701951 Neoverse V2: erratum 2719103 Cortex-A710: erratum 2701952 Cortex-X2: erratum 2701952 Neoverse N2: erratum 2728475 Neoverse V1: erratum 2701953 Cortex-A78: erratum 2712571 Cortex-A78AE: erratum 2712574 Cortex-A78C: erratum 2712575 Change-Id: Ie86b7212d731a79e2a0c07649e69234e733cd78d Signed-off-by: Sona Mathew <sonarebecca.mathew@arm.com>
32 lines
1,020 B
Makefile
32 lines
1,020 B
Makefile
#
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# Copyright (c) 2023-2024, Arm Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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# Flags to enable the cpu structures in the Errata ABI file
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# file: services/std_svc/errata_abi/errata_abi_main.c. This is specifically
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# for platforms that need to enable errata based on non-arm interconnect IP.
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ifeq (${ERRATA_ABI_SUPPORT}, 1)
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ifeq (${ERRATA_NON_ARM_INTERCONNECT}, 1)
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ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0)
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CORTEX_A78_H_INC := 1
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NEOVERSE_N2_H_INC := 1
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NEOVERSE_V1_H_INC := 1
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CORTEX_A78_AE_H_INC := 1
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CORTEX_A710_H_INC := 1
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CORTEX_A715_H_INC := 1
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CORTEX_A78C_H_INC := 1
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CORTEX_X2_H_INC := 1
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$(eval $(call add_define, CORTEX_A78_H_INC))
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$(eval $(call add_define, NEOVERSE_N2_H_INC))
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$(eval $(call add_define, NEOVERSE_V1_H_INC))
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$(eval $(call add_define, CORTEX_A78_AE_H_INC))
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$(eval $(call add_define, CORTEX_A710_H_INC))
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$(eval $(call add_define, CORTEX_A715_H_INC))
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$(eval $(call add_define, CORTEX_A78C_H_INC))
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$(eval $(call add_define, CORTEX_X2_H_INC))
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endif
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endif
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endif
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