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ab062f0510
The workarounds for these below mentioned errata are not implemented in EL3, but the flags can be enabled/disabled at a platform level based on arm/non-arm interconnect IP. The ABI helps assist the Kernel in the process of mitigation for the following errata: Cortex-A715: erratum 2701951 Neoverse V2: erratum 2719103 Cortex-A710: erratum 2701952 Cortex-X2: erratum 2701952 Neoverse N2: erratum 2728475 Neoverse V1: erratum 2701953 Cortex-A78: erratum 2712571 Cortex-A78AE: erratum 2712574 Cortex-A78C: erratum 2712575 EL3 provides an appropriate return value via errata ABI when the kernel makes an SMC call using the EM_CPU_ERRATUM_FEATURES FID with the appropriate erratum ID. Change-Id: I35bd69d812dba37410dd8bc2bbde20d4955b0850 Signed-off-by: Sona Mathew <SonaRebecca.Mathew@arm.com>
72 lines
1.9 KiB
C
72 lines
1.9 KiB
C
/*
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* Copyright (c) 2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef ERRATA_CPUSPEC_H
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#define ERRATA_CPUSPEC_H
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#include <stdint.h>
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#include <arch_helpers.h>
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#if __aarch64__
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#include <cortex_a35.h>
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#include <cortex_a510.h>
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#include <cortex_a53.h>
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#include <cortex_a57.h>
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#include <cortex_a55.h>
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#include <cortex_a710.h>
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#include <cortex_a72.h>
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#include <cortex_a73.h>
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#include <cortex_a75.h>
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#include <cortex_a76.h>
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#include <cortex_a77.h>
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#include <cortex_a78.h>
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#include <cortex_a78_ae.h>
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#include <cortex_a78c.h>
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#include <cortex_makalu.h>
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#include <cortex_x1.h>
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#include <cortex_x2.h>
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#include <neoverse_n1.h>
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#include <neoverse_n2.h>
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#include <neoverse_v1.h>
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#include <neoverse_v2.h>
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#else
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#include <cortex_a15.h>
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#include <cortex_a17.h>
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#include <cortex_a57.h>
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#include <cortex_a9.h>
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#endif
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#define MAX_ERRATA_ENTRIES 16
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#define ERRATA_LIST_END (MAX_ERRATA_ENTRIES - 1)
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/* Default values for unused memory in the array */
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#define UNDEF_ERRATA {UINT_MAX, UCHAR_MAX, UCHAR_MAX, false, false}
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#define EXTRACT_PARTNUM(x) ((x >> MIDR_PN_SHIFT) & MIDR_PN_MASK)
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#define RXPX_RANGE(x, y, z) (((x >= y) && (x <= z)) ? true : false)
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/*
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* CPU specific values for errata handling
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*/
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struct em_cpu{
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unsigned int em_errata_id;
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unsigned char em_rxpx_lo; /* lowest revision of errata applicable for the cpu */
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unsigned char em_rxpx_hi; /* highest revision of errata applicable for the cpu */
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bool errata_enabled; /* indicate if errata enabled */
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/* flag to indicate if errata query is based out of non-arm interconnect */
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bool non_arm_interconnect;
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};
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struct em_cpu_list{
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/* field to hold cpu specific part number defined in midr reg */
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unsigned long cpu_partnumber;
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struct em_cpu cpu_errata_list[MAX_ERRATA_ENTRIES];
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};
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int32_t verify_errata_implemented(uint32_t errata_id, uint32_t forward_flag);
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#endif /* ERRATA_CPUSPEC_H */
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