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- Boot up 4 cores. - Add a generic UART driver. - Add generic CPU helper functions - Supoort suspend - Add system_off & system_reset implementation - Add crash console reporting implementation - Add get_sys_suspend_power_state() for PSCI 1.0 SYSTEM_SUSPEND - Add Mediatek SIP runtime service - Add delay timer platform implementation Change-Id: I44138249f115ee10b9cbd26fdbc2dd3af04d825f Signed-off-by: CC Ma <cc.ma@mediatek.com> Signed-off-by: Jimmy Huang <jimmy.huang@mediatek.com>
53 lines
2 KiB
C
53 lines
2 KiB
C
/*
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* Copyright (c) 2015, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <arch.h>
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#include <mcucfg.h>
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#include <mmio.h>
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void disable_scu(unsigned long mpidr)
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{
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if (mpidr & MPIDR_CLUSTER_MASK)
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mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp1_miscdbg,
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MP1_ACINACTM);
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else
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mmio_setbits_32((uintptr_t)&mt8173_mcucfg->mp0_axi_config,
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MP0_ACINACTM);
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}
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void enable_scu(unsigned long mpidr)
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{
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if (mpidr & MPIDR_CLUSTER_MASK)
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mmio_clrbits_32((uintptr_t)&mt8173_mcucfg->mp1_miscdbg,
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MP1_ACINACTM);
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else
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mmio_clrbits_32((uintptr_t)&mt8173_mcucfg->mp0_axi_config,
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MP0_ACINACTM);
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}
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