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https://github.com/ARM-software/arm-trusted-firmware.git
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981b9dcb87
The code managing legacy boot (without FIP) that was under STM32MP_USE_STM32IMAGE flag is remove. Change-Id: I04452453ed84567b0de39e900594a81526562259 Signed-off-by: Yann Gautier <yann.gautier@st.com>
71 lines
1.7 KiB
ArmAsm
71 lines
1.7 KiB
ArmAsm
/*
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* Copyright (c) 2015-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STM32MP1_LD_S
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#define STM32MP1_LD_S
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#include <lib/xlat_tables/xlat_tables_defs.h>
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#include <platform_def.h>
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OUTPUT_FORMAT(PLATFORM_LINKER_FORMAT)
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OUTPUT_ARCH(PLATFORM_LINKER_ARCH)
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ENTRY(__BL2_IMAGE_START__)
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MEMORY {
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HEADER (rw) : ORIGIN = 0x00000000, LENGTH = STM32MP_HEADER_RESERVED_SIZE
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RAM (rwx) : ORIGIN = STM32MP_BINARY_BASE, LENGTH = STM32MP_BINARY_SIZE
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}
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SECTIONS
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{
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/*
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* TF mapping must conform to ROM code specification.
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*/
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.header : {
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__HEADER_START__ = .;
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KEEP(*(.header))
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. = ALIGN(4);
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__HEADER_END__ = .;
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} >HEADER
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. = STM32MP_BINARY_BASE;
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.data . : {
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. = ALIGN(PAGE_SIZE);
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__DATA_START__ = .;
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*(.data*)
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/*
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* dtb.
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* The strongest and only alignment contraint is MMU 4K page.
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* Indeed as images below will be removed, 4K pages will be re-used.
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*/
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. = ( STM32MP_BL2_DTB_BASE - STM32MP_BINARY_BASE );
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__DTB_IMAGE_START__ = .;
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*(.dtb_image*)
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__DTB_IMAGE_END__ = .;
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/*
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* bl2.
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* The strongest and only alignment contraint is MMU 4K page.
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* Indeed as images below will be removed, 4K pages will be re-used.
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*/
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#if SEPARATE_CODE_AND_RODATA
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. = ( STM32MP_BL2_RO_BASE - STM32MP_BINARY_BASE );
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#else
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. = ( STM32MP_BL2_BASE - STM32MP_BINARY_BASE );
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#endif
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__BL2_IMAGE_START__ = .;
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*(.bl2_image*)
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__BL2_IMAGE_END__ = .;
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__DATA_END__ = .;
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} >RAM
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__TF_END__ = .;
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}
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#endif /* STM32MP1_LD_S */
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