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There are a number or ARMv7 Rockchip SoCs that are very similar in their bringup routines to the existing arm64 SoCs, so there is quite a high commonality possible here. Things like virtualization also need psci and hyp-mode and instead of trying to cram this into bootloaders like u-boot, barebox or coreboot (all used in the field), re-use the existing infrastructure in TF-A for this (both Rockchip plat support and armv7 support in general). So add core support for aarch32 Rockchip SoCs, with actual soc support following in a separate patch. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Change-Id: I298453985b5d8434934fc0c742fda719e994ba0b
39 lines
957 B
C
39 lines
957 B
C
/*
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* Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <platform_def.h>
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#include <arch.h>
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#include <lib/psci/psci.h>
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#include <plat_private.h>
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/*******************************************************************************
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* This function returns the RockChip default topology tree information.
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******************************************************************************/
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const unsigned char *plat_get_power_domain_tree_desc(void)
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{
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return rockchip_power_domain_tree_desc;
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}
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int plat_core_pos_by_mpidr(u_register_t mpidr)
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{
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unsigned int cluster_id, cpu_id;
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cpu_id = mpidr & MPIDR_AFFLVL_MASK;
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#ifdef PLAT_RK_MPIDR_CLUSTER_MASK
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cluster_id = mpidr & PLAT_RK_MPIDR_CLUSTER_MASK;
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#else
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cluster_id = mpidr & MPIDR_CLUSTER_MASK;
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#endif
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cpu_id += (cluster_id >> PLAT_RK_CLST_TO_CPUID_SHIFT);
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if (cpu_id >= PLATFORM_CORE_COUNT)
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return -1;
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return cpu_id;
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}
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