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https://github.com/ARM-software/arm-trusted-firmware.git
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564e073cd5
Revise the AST2700 boot flow to the RESET_TO_BL31 scheme. The execution of BL1/2 can be saved from ARM CA35 while most low level platform initialization are moved to a preceding MCU. This patch updates the build configuration and also adds the SMP mailbox setup code to hold secondary cores until they are being waken up. Signed-off-by: Chia-Wei Wang <chiawei_wang@aspeedtech.com> Change-Id: I7e0aa6416b92b97036153db1d9a26baaa41b7b18
86 lines
2 KiB
ArmAsm
86 lines
2 KiB
ArmAsm
/*
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* Copyright (c) 2023, Aspeed Technology Inc.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm_macros.S>
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#include <assert_macros.S>
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#include <arch.h>
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#include <cortex_a35.h>
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#include <platform_def.h>
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.globl platform_mem_init
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.globl plat_is_my_cpu_primary
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.globl plat_my_core_pos
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.globl plat_secondary_cold_boot_setup
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.globl plat_get_syscnt_freq2
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.globl plat_crash_console_init
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.globl plat_crash_console_putc
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.globl plat_crash_console_flush
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/* void platform_mem_init(void); */
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func platform_mem_init
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/* DRAM init. is done by preceding MCU */
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ret
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endfunc platform_mem_init
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/* unsigned int plat_is_my_cpu_primary(void); */
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func plat_is_my_cpu_primary
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mrs x0, mpidr_el1
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and x0, x0, #(MPIDR_CLUSTER_MASK | MPIDR_CPU_MASK)
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cmp x0, #PLATFORM_CORE_PRIMARY
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cset w0, eq
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ret
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endfunc plat_is_my_cpu_primary
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/* unsigned int plat_my_core_pos(void); */
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func plat_my_core_pos
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mrs x0, mpidr_el1
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mov x2, #PLATFORM_CORE_COUNT_PER_CLUSTER
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and x1, x0, #MPIDR_CPU_MASK
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and x0, x0, #MPIDR_CLUSTER_MASK
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madd x0, x0, x2, x1
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ret
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endfunc plat_my_core_pos
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/* void plat_secondary_cold_boot_setup (void); */
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func plat_secondary_cold_boot_setup
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mov x0, xzr
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bl plat_my_core_pos
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mov_imm x1, SCU_CPU_SMP_EP0
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add x1, x1, x0, lsl #3
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poll_smp_mbox_go:
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wfe
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ldr x0, [x1]
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cmp x0, xzr
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beq poll_smp_mbox_go
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br x0
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endfunc plat_secondary_cold_boot_setup
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/* unsigned int plat_get_syscnt_freq2(void); */
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func plat_get_syscnt_freq2
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mov_imm w0, PLAT_SYSCNT_CLKIN_HZ
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ret
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endfunc plat_get_syscnt_freq2
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/* int plat_crash_console_init(void); */
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func plat_crash_console_init
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mov_imm x0, CONSOLE_UART_BASE
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mov_imm x1, CONSOLE_UART_CLKIN_HZ
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mov_imm x2, CONSOLE_UART_BAUDRATE
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b console_16550_core_init
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endfunc plat_crash_console_init
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/* int plat_crash_console_putc(int); */
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func plat_crash_console_putc
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mov_imm x1, CONSOLE_UART_BASE
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b console_16550_core_putc
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endfunc plat_crash_console_putc
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/* void plat_crash_console_flush(void); */
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func plat_crash_console_flush
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mov_imm x0, CONSOLE_UART_BASE
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b console_16550_core_flush
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endfunc plat_crash_console_flush
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