mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-09 06:13:54 +00:00
cf237f8d55
Replace trace macros with their corresponding EARLY_* macros. Add some early traces in bsec2 driver. Change-Id: I65e2feee6e7ba2524fb0a334557aa6e883672765 Signed-off-by: Yann Gautier <yann.gautier@st.com>
533 lines
11 KiB
C
533 lines
11 KiB
C
/*
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* Copyright (c) 2024, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <limits.h>
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#include <arch_helpers.h>
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#include <common/debug.h>
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#include <drivers/st/bsec.h>
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#include <drivers/st/bsec3_reg.h>
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#include <drivers/st/stm32mp_reset.h>
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#include <lib/mmio.h>
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#include <lib/spinlock.h>
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#include <libfdt.h>
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#include <platform_def.h>
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#define BSEC_IP_VERSION_1_0 U(0x10)
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#define BSEC_IP_ID_3 U(0x100033)
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#define MAX_NB_TRIES U(3)
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/*
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* IP configuration
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*/
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#define BSEC_OTP_MASK GENMASK_32(4, 0)
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#define BSEC_OTP_BANK_SHIFT U(5)
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#define BSEC_TIMEOUT_VALUE U(0x800000) /* ~7sec @1.2GHz */
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/* Magic use to indicated valid SHADOW = 'B' 'S' 'E' 'C' */
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#define BSEC_MAGIC U(0x42534543)
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#define OTP_MAX_SIZE (STM32MP2_OTP_MAX_ID + U(1))
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struct bsec_shadow {
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uint32_t magic;
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uint32_t state;
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uint32_t value[OTP_MAX_SIZE];
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uint32_t status[OTP_MAX_SIZE];
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};
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static uint32_t otp_bank(uint32_t otp)
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{
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if (otp > STM32MP2_OTP_MAX_ID) {
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panic();
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}
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return (otp & ~BSEC_OTP_MASK) >> BSEC_OTP_BANK_SHIFT;
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}
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static uint32_t otp_bit_mask(uint32_t otp)
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{
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return BIT(otp & BSEC_OTP_MASK);
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}
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/*
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* bsec_get_status: return status register value.
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*/
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static uint32_t bsec_get_status(void)
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{
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return mmio_read_32(BSEC_BASE + BSEC_OTPSR);
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}
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/*
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* bsec_get_version: return BSEC version.
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*/
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static uint32_t bsec_get_version(void)
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{
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return mmio_read_32(BSEC_BASE + BSEC_VERR) & BSEC_VERR_MASK;
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}
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/*
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* bsec_get_id: return BSEC ID.
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*/
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static uint32_t bsec_get_id(void)
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{
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return mmio_read_32(BSEC_BASE + BSEC_IPIDR);
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}
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static bool is_fuse_shadowed(uint32_t otp)
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{
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uint32_t bank = otp_bank(otp);
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uint32_t otp_mask = otp_bit_mask(otp);
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uint32_t bank_value;
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bank_value = mmio_read_32(BSEC_BASE + BSEC_SFSR(bank));
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if ((bank_value & otp_mask) != 0U) {
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return true;
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}
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return false;
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}
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static void poll_otp_status_busy(void)
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{
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uint32_t timeout = BSEC_TIMEOUT_VALUE;
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while (((bsec_get_status() & BSEC_OTPSR_BUSY) != 0U) && (timeout != 0U)) {
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timeout--;
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}
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if ((bsec_get_status() & BSEC_OTPSR_BUSY) != 0U) {
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ERROR("BSEC timeout\n");
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panic();
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}
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}
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static uint32_t check_read_error(uint32_t otp)
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{
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uint32_t status = bsec_get_status();
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if ((status & BSEC_OTPSR_SECF) != 0U) {
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VERBOSE("BSEC read %u single error correction detected\n", otp);
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}
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if ((status & BSEC_OTPSR_PPLF) != 0U) {
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VERBOSE("BSEC read %u permanent programming lock detected.\n", otp);
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}
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if ((status & BSEC_OTPSR_PPLMF) != 0U) {
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ERROR("BSEC read %u error 0x%x\n", otp, status);
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return BSEC_ERROR;
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}
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if ((status & (BSEC_OTPSR_DISTURBF | BSEC_OTPSR_DEDF | BSEC_OTPSR_AMEF)) != 0U) {
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ERROR("BSEC read %u error 0x%x with invalid FVR\n", otp, status);
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return BSEC_RETRY;
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}
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return BSEC_OK;
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}
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static uint32_t check_program_error(uint32_t otp)
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{
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uint32_t status = bsec_get_status();
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if ((status & BSEC_OTPSR_PROGFAIL) != 0U) {
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ERROR("BSEC program %u error 0x%x\n", otp, status);
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return BSEC_RETRY;
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}
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return BSEC_OK;
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}
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static void check_reset_error(void)
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{
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uint32_t status = bsec_get_status();
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/* check initial status reporting */
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if ((status & BSEC_OTPSR_BUSY) != 0U) {
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VERBOSE("BSEC reset and busy when OTPSR read\n");
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}
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if ((status & BSEC_OTPSR_HIDEUP) != 0U) {
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VERBOSE("BSEC upper fuse are not accessible (HIDEUP)\n");
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}
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if ((status & BSEC_OTPSR_OTPSEC) != 0U) {
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VERBOSE("BSEC reset single error correction detected\n");
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}
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if ((status & BSEC_OTPSR_OTPNVIR) == 0U) {
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VERBOSE("BSEC reset first fuse word 0 is detected zero\n");
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}
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if ((status & BSEC_OTPSR_OTPERR) != 0U) {
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ERROR("BSEC reset critical error 0x%x\n", status);
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panic();
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}
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if ((status & BSEC_OTPSR_FUSEOK) != BSEC_OTPSR_FUSEOK) {
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ERROR("BSEC reset critical error 0x%x\n", status);
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panic();
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}
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}
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static bool is_bsec_write_locked(void)
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{
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return (mmio_read_32(BSEC_BASE + BSEC_LOCKR) & BSEC_LOCKR_GWLOCK_MASK) != 0U;
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}
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/*
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* bsec_probe: initialize BSEC driver.
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* return value: BSEC_OK if no error.
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*/
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uint32_t bsec_probe(void)
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{
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uint32_t version = bsec_get_version();
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uint32_t id = bsec_get_id();
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if ((version != BSEC_IP_VERSION_1_0) || (id != BSEC_IP_ID_3)) {
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EARLY_ERROR("%s: version = 0x%x, id = 0x%x\n", __func__, version, id);
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panic();
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}
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check_reset_error();
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return BSEC_OK;
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}
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/*
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* bsec_shadow_register: copy SAFMEM OTP to BSEC data.
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* otp: OTP number.
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* return value: BSEC_OK if no error.
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*/
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static uint32_t bsec_shadow_register(uint32_t otp)
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{
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uint32_t result;
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uint32_t i;
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bool value;
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result = bsec_read_sr_lock(otp, &value);
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if (result != BSEC_OK) {
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WARN("BSEC: %u Sticky-read bit read Error %u\n", otp, result);
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} else if (value) {
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VERBOSE("BSEC: OTP %u is locked and will not be refreshed\n", otp);
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}
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for (i = 0U; i < MAX_NB_TRIES; i++) {
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mmio_write_32(BSEC_BASE + BSEC_OTPCR, otp);
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poll_otp_status_busy();
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result = check_read_error(otp);
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if (result != BSEC_RETRY) {
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break;
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}
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}
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return result;
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}
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/*
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* bsec_write_otp: write a value in shadow OTP.
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* val: value to program.
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* otp: OTP number.
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* return value: BSEC_OK if no error.
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*/
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uint32_t bsec_write_otp(uint32_t val, uint32_t otp)
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{
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bool state;
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uint32_t result;
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if (otp > STM32MP2_OTP_MAX_ID) {
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panic();
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}
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if (!is_fuse_shadowed(otp)) {
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return BSEC_ERROR;
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}
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if (is_bsec_write_locked()) {
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return BSEC_WRITE_LOCKED;
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}
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result = bsec_read_sw_lock(otp, &state);
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if (result != BSEC_OK) {
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WARN("Shadow register is SW locked\n");
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return result;
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}
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mmio_write_32(BSEC_BASE + BSEC_FVR(otp), val);
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return BSEC_OK;
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}
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/*
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* bsec_program_otp: program a bit in SAFMEM after the prog.
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* The OTP data is not refreshed.
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* val: value to program.
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* otp: OTP number.
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* return value: BSEC_OK if no error.
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*/
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uint32_t bsec_program_otp(uint32_t val, uint32_t otp)
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{
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uint32_t result;
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uint32_t i;
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bool value;
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if (otp > STM32MP2_OTP_MAX_ID) {
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panic();
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}
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if (is_bsec_write_locked() == true) {
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return BSEC_WRITE_LOCKED;
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}
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result = bsec_read_sp_lock(otp, &value);
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if (result != BSEC_OK) {
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WARN("BSEC: %u Sticky-prog bit read Error %u\n", otp, result);
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} else if (value) {
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WARN("BSEC: OTP locked, prog will be ignored\n");
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return BSEC_WRITE_LOCKED;
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}
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mmio_write_32(BSEC_BASE + BSEC_WDR, val);
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for (i = 0U; i < MAX_NB_TRIES; i++) {
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mmio_write_32(BSEC_BASE + BSEC_OTPCR, otp | BSEC_OTPCR_PROG);
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poll_otp_status_busy();
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result = check_program_error(otp);
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if (result != BSEC_RETRY) {
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break;
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}
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}
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return result;
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}
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/*
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* bsec_read_debug_conf: read debug configuration.
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*/
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uint32_t bsec_read_debug_conf(void)
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{
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return mmio_read_32(BSEC_BASE + BSEC_DENR);
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}
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static uint32_t bsec_lock_register_set(uint32_t offset, uint32_t mask)
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{
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uint32_t value = mmio_read_32(BSEC_BASE + offset);
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/* The lock is already set */
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if ((value & mask) != 0U) {
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return BSEC_OK;
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}
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if (is_bsec_write_locked()) {
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return BSEC_WRITE_LOCKED;
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}
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value |= mask;
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mmio_write_32(BSEC_BASE + offset, value);
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return BSEC_OK;
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}
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static bool bsec_lock_register_get(uint32_t offset, uint32_t mask)
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{
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uint32_t value = mmio_read_32(BSEC_BASE + offset);
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return (value & mask) != 0U;
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}
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/*
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* bsec_set_sr_lock: set shadow-read lock.
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* otp: OTP number.
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* return value: BSEC_OK if no error.
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*/
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uint32_t bsec_set_sr_lock(uint32_t otp)
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{
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uint32_t bank = otp_bank(otp);
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uint32_t otp_mask = otp_bit_mask(otp);
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if (otp > STM32MP2_OTP_MAX_ID) {
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panic();
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}
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return bsec_lock_register_set(BSEC_SRLOCK(bank), otp_mask);
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}
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/*
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* bsec_read_sr_lock: read shadow-read lock.
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* otp: OTP number.
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* value: read value (true or false).
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* return value: BSEC_OK if no error.
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*/
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uint32_t bsec_read_sr_lock(uint32_t otp, bool *value)
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{
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uint32_t bank = otp_bank(otp);
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uint32_t otp_mask = otp_bit_mask(otp);
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assert(value != NULL);
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if (otp > STM32MP2_OTP_MAX_ID) {
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panic();
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}
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*value = bsec_lock_register_get(BSEC_SRLOCK(bank), otp_mask);
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return BSEC_OK;
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}
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/*
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* bsec_set_sw_lock: set shadow-write lock.
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* otp: OTP number.
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* return value: BSEC_OK if no error.
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*/
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uint32_t bsec_set_sw_lock(uint32_t otp)
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{
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uint32_t bank = otp_bank(otp);
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uint32_t otp_mask = otp_bit_mask(otp);
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if (otp > STM32MP2_OTP_MAX_ID) {
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panic();
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}
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return bsec_lock_register_set(BSEC_SWLOCK(bank), otp_mask);
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}
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/*
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* bsec_read_sw_lock: read shadow-write lock.
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* otp: OTP number.
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* value: read value (true or false).
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* return value: BSEC_OK if no error.
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*/
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uint32_t bsec_read_sw_lock(uint32_t otp, bool *value)
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{
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uint32_t bank = otp_bank(otp);
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uint32_t otp_mask = otp_bit_mask(otp);
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assert(value != NULL);
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if (otp > STM32MP2_OTP_MAX_ID) {
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panic();
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}
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*value = bsec_lock_register_get(BSEC_SWLOCK(bank), otp_mask);
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return BSEC_OK;
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}
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/*
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* bsec_set_sp_lock: set shadow-program lock.
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* otp: OTP number.
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* return value: BSEC_OK if no error.
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*/
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uint32_t bsec_set_sp_lock(uint32_t otp)
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{
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uint32_t bank = otp_bank(otp);
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uint32_t otp_mask = otp_bit_mask(otp);
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if (otp > STM32MP2_OTP_MAX_ID) {
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panic();
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}
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return bsec_lock_register_set(BSEC_SPLOCK(bank), otp_mask);
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}
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/*
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* bsec_read_sp_lock: read shadow-program lock.
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* otp: OTP number.
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* value: read value (true or false).
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* return value: BSEC_OK if no error.
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*/
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uint32_t bsec_read_sp_lock(uint32_t otp, bool *value)
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{
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uint32_t bank = otp_bank(otp);
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uint32_t otp_mask = otp_bit_mask(otp);
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assert(value != NULL);
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if (otp > STM32MP2_OTP_MAX_ID) {
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panic();
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}
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*value = bsec_lock_register_get(BSEC_SPLOCK(bank), otp_mask);
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return BSEC_OK;
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}
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/*
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* bsec_get_secure_state: read state in BSEC status register.
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* return: secure state
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*/
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uint32_t bsec_get_secure_state(void)
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{
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uint32_t state = BSEC_STATE_INVALID;
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uint32_t status = bsec_get_status();
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uint32_t bsec_sr = mmio_read_32(BSEC_BASE + BSEC_SR);
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if ((status & BSEC_OTPSR_FUSEOK) == BSEC_OTPSR_FUSEOK) {
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/* NVSTATE is only valid if FUSEOK */
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uint32_t nvstates = (bsec_sr & BSEC_SR_NVSTATE_MASK) >> BSEC_SR_NVSTATE_SHIFT;
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if (nvstates == BSEC_SR_NVSTATE_OPEN) {
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state = BSEC_STATE_SEC_OPEN;
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} else if (nvstates == BSEC_SR_NVSTATE_CLOSED) {
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state = BSEC_STATE_SEC_CLOSED;
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} else {
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VERBOSE("%s nvstates = %u\n", __func__, nvstates);
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}
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}
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return state;
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}
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/*
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* bsec_shadow_read_otp: Load OTP from SAFMEM and provide its value
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* val: read value.
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* otp: OTP number.
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* return value: BSEC_OK if no error.
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*/
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uint32_t bsec_shadow_read_otp(uint32_t *val, uint32_t otp)
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{
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assert(val != NULL);
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if (otp > STM32MP2_OTP_MAX_ID) {
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panic();
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}
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*val = 0U;
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if (is_bsec_write_locked()) {
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return BSEC_WRITE_LOCKED;
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}
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if (!is_fuse_shadowed(otp)) {
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uint32_t result = bsec_shadow_register(otp);
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if (result != BSEC_OK) {
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ERROR("BSEC: %u Shadowing Error %u\n", otp, result);
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return result;
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}
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}
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*val = mmio_read_32(BSEC_BASE + BSEC_FVR(otp));
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return BSEC_OK;
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}
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/*
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* bsec_read_otp: read an OTP data value.
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* val: read value.
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* otp: OTP number.
|
|
* return value: BSEC_OK if no error.
|
|
*/
|
|
uint32_t bsec_read_otp(uint32_t *val, uint32_t otp)
|
|
{
|
|
assert(val != NULL);
|
|
if (otp > STM32MP2_OTP_MAX_ID) {
|
|
panic();
|
|
}
|
|
|
|
return bsec_shadow_read_otp(val, otp);
|
|
}
|