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b525a8f0d2
Flexspi driver now introduces read/write/erase APIs for complete flash size, FAST-READ are by default used and IP bus is used for erase, read and write using flexspi APIs. Framework layer is currently embedded in driver itself using flash_info defines. Test cases are also added to confirm flash functionality currently under DEBUG flag. Signed-off-by: Pankaj Gupta <pankaj.gupta@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Change-Id: I755c0f763f6297a35cad6885f84640de50f51bb0
15 lines
278 B
C
15 lines
278 B
C
/*
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* Copyright 2020 NXP
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*
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*/
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#ifndef FLEXSPI_NOR_H
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#define FLEXSPI_NOR_H
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int flexspi_nor_io_setup(uintptr_t nxp_flexspi_flash_addr,
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size_t nxp_flexspi_flash_size,
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uint32_t fspi_base_reg_addr);
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#endif /* FLEXSPI_NOR_H */
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