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MPMM - the Maximum Power Mitigation Mechanism - is an optional microarchitectural feature present on some Armv9-A cores, introduced with the Cortex-X2, Cortex-A710 and Cortex-A510 cores. MPMM allows the SoC firmware to detect and limit high activity events to assist in SoC processor power domain dynamic power budgeting and limit the triggering of whole-rail (i.e. clock chopping) responses to overcurrent conditions. This feature is enabled via the `ENABLE_MPMM` build option. Configuration can be done via FCONF by enabling `ENABLE_MPMM_FCONF`, or by via the plaform-implemented `plat_mpmm_topology` function. Change-Id: I77da82808ad4744ece8263f0bf215c5a091c3167 Signed-off-by: Chris Kay <chris.kay@arm.com>
29 lines
862 B
Makefile
29 lines
862 B
Makefile
#
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# Copyright (c) 2021, Arm Limited. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include lib/extensions/amu/amu.mk
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include lib/fconf/fconf.mk
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ifneq (${ENABLE_MPMM},0)
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ifneq ($(ARCH),aarch64)
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$(error MPMM support (`ENABLE_MPMM`) can only be enabled in AArch64 images (`ARCH`))
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endif
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ifeq (${ENABLE_AMU_AUXILIARY_COUNTERS},0) # For MPMM gear AMU counters
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$(error MPMM support (`ENABLE_MPM`) requires auxiliary AMU counter support (`ENABLE_AMU_AUXILIARY_COUNTERS`))
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endif
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endif
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MPMM_SOURCES := lib/mpmm/mpmm.c
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MPMM_SOURCES += ${AMU_SOURCES}
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ifneq (${ENABLE_MPMM_FCONF},0)
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ifeq (${ENABLE_MPMM},0)
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$(error MPMM FCONF support (`ENABLE_MPMM_FCONF`) requires MPMM support (`ENABLE_MPMM`))
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endif
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MPMM_SOURCES += ${FCONF_MPMM_SOURCES}
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endif
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