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a6ea06f563
This patch moves all GICv3 driver files into new added 'gicv3.mk' makefile for the benefit of the generic driver which can evolve in the future without affecting platforms. The patch adds GICv3 driver configuration flags 'GICV3_IMPL', 'GICV3_IMPL_GIC600_MULTICHIP' and 'GICV3_OVERRIDE_DISTIF_PWR_OPS' described in 'GICv3 driver options' section of 'build-option.rst' document. NOTE: Platforms with GICv3 driver need to be modified to include 'drivers/arm/gic/v3/gicv3.mk' in their makefiles. Change-Id: If055f6770ff20f5dee5a3c99ae7ced7cdcac5c44 Signed-off-by: Alexei Fedorov <Alexei.Fedorov@arm.com>
109 lines
3.5 KiB
Makefile
109 lines
3.5 KiB
Makefile
#
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# Copyright (c) 2016-2020, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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RK_PLAT := plat/rockchip
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RK_PLAT_SOC := ${RK_PLAT}/${PLAT}
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RK_PLAT_COMMON := ${RK_PLAT}/common
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DISABLE_BIN_GENERATION := 1
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PLAT_INCLUDES := -I${RK_PLAT_COMMON}/ \
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-I${RK_PLAT_COMMON}/include/ \
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-I${RK_PLAT_COMMON}/aarch64/ \
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-I${RK_PLAT_COMMON}/drivers/pmu/ \
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-I${RK_PLAT_SOC}/ \
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-I${RK_PLAT_SOC}/drivers/pmu/ \
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-I${RK_PLAT_SOC}/drivers/pwm/ \
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-I${RK_PLAT_SOC}/drivers/secure/ \
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-I${RK_PLAT_SOC}/drivers/soc/ \
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-I${RK_PLAT_SOC}/drivers/dram/ \
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-I${RK_PLAT_SOC}/drivers/dp/ \
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-I${RK_PLAT_SOC}/include/ \
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-I${RK_PLAT_SOC}/include/shared/ \
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# Include GICv3 driver files
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include drivers/arm/gic/v3/gicv3.mk
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RK_GIC_SOURCES := ${GICV3_SOURCES} \
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plat/common/plat_gicv3.c \
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${RK_PLAT}/common/rockchip_gicv3.c
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PLAT_BL_COMMON_SOURCES := common/desc_image_load.c \
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lib/bl_aux_params/bl_aux_params.c \
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lib/xlat_tables/xlat_tables_common.c \
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lib/xlat_tables/aarch64/xlat_tables.c \
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plat/common/aarch64/crash_console_helpers.S \
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plat/common/plat_psci_common.c
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BL31_SOURCES += ${RK_GIC_SOURCES} \
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drivers/arm/cci/cci.c \
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drivers/ti/uart/aarch64/16550_console.S \
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drivers/delay_timer/delay_timer.c \
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drivers/delay_timer/generic_delay_timer.c \
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drivers/gpio/gpio.c \
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lib/cpus/aarch64/cortex_a53.S \
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lib/cpus/aarch64/cortex_a72.S \
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${RK_PLAT_COMMON}/aarch64/plat_helpers.S \
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${RK_PLAT_COMMON}/bl31_plat_setup.c \
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${RK_PLAT_COMMON}/params_setup.c \
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${RK_PLAT_COMMON}/aarch64/pmu_sram_cpus_on.S \
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${RK_PLAT_COMMON}/plat_pm.c \
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${RK_PLAT_COMMON}/plat_topology.c \
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${RK_PLAT_COMMON}/aarch64/platform_common.c \
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${RK_PLAT_COMMON}/rockchip_sip_svc.c \
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${RK_PLAT_SOC}/plat_sip_calls.c \
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${RK_PLAT_SOC}/drivers/gpio/rk3399_gpio.c \
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${RK_PLAT_SOC}/drivers/pmu/pmu.c \
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${RK_PLAT_SOC}/drivers/pmu/pmu_fw.c \
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${RK_PLAT_SOC}/drivers/pmu/m0_ctl.c \
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${RK_PLAT_SOC}/drivers/pwm/pwm.c \
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${RK_PLAT_SOC}/drivers/secure/secure.c \
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${RK_PLAT_SOC}/drivers/soc/soc.c \
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${RK_PLAT_SOC}/drivers/dram/dfs.c \
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${RK_PLAT_SOC}/drivers/dram/dram.c \
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${RK_PLAT_SOC}/drivers/dram/dram_spec_timing.c \
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${RK_PLAT_SOC}/drivers/dram/suspend.c
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include lib/coreboot/coreboot.mk
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include lib/libfdt/libfdt.mk
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$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT))
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# Enable workarounds for selected Cortex-A53 erratas.
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ERRATA_A53_855873 := 1
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# M0 source build
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PLAT_M0 := ${PLAT}m0
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BUILD_M0 := ${BUILD_PLAT}/m0
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RK3399M0FW=${BUILD_M0}/${PLAT_M0}.bin
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$(eval $(call add_define_val,RK3399M0FW,\"$(RK3399M0FW)\"))
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RK3399M0PMUFW=${BUILD_M0}/${PLAT_M0}pmu.bin
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$(eval $(call add_define_val,RK3399M0PMUFW,\"$(RK3399M0PMUFW)\"))
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ifdef PLAT_RK_DP_HDCP
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BL31_SOURCES += ${RK_PLAT_SOC}/drivers/dp/cdn_dp.c
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HDCPFW=${RK_PLAT_SOC}/drivers/dp/hdcp.bin
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$(eval $(call add_define_val,HDCPFW,\"$(HDCPFW)\"))
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${BUILD_PLAT}/bl31/cdn_dp.o: CCACHE_EXTRAFILES=$(HDCPFW)
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${RK_PLAT_SOC}/drivers/dp/cdn_dp.c: $(HDCPFW)
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endif
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# CCACHE_EXTRAFILES is needed because ccache doesn't handle .incbin
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export CCACHE_EXTRAFILES
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${BUILD_PLAT}/bl31/pmu_fw.o: CCACHE_EXTRAFILES=$(RK3399M0FW):$(RK3399M0PMUFW)
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${RK_PLAT_SOC}/drivers/pmu/pmu_fw.c: $(RK3399M0FW)
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$(eval $(call MAKE_PREREQ_DIR,${BUILD_M0},${BUILD_PLAT}))
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.PHONY: $(RK3399M0FW)
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$(RK3399M0FW): | ${BUILD_M0}
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$(MAKE) -C ${RK_PLAT_SOC}/drivers/m0 BUILD=$(abspath ${BUILD_PLAT}/m0)
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# Do not enable SVE
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ENABLE_SVE_FOR_NS := 0
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