Bipin Ravi a63332c517 fix(cpus): workaround for Cortex-A78 erratum 2742426 ... Cortex-A78 erratum 2742426 is a Cat B erratum that applies to all revisions <= r1p2 and is still open. The workaround is to set the CPUACTLR5_EL1[56:55] to 2'b01. SDEN documentation: https://developer.arm.com/documentation/SDEN1401784/latest Signed-off-by: Bipin Ravi <bipin.ravi@arm.com> Change-Id: I42506a87d41c9e2b30bc78c08d22f36e1f9635c1		2023-03-08 14:58:05 -06:00
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aarch32	build: always prefix section names with .	2023-02-20 18:29:33 +00:00
aarch64	fix(cpus): workaround for Cortex-A78 erratum 2742426	2023-03-08 14:58:05 -06:00
errata_report.h	Workaround for Cortex A78 erratum 1951500	2021-01-13 13:54:18 -06:00
wa_cve_2017_5715.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2018_3639.h	Fix MISRA defects in workaround and errata framework	2018-10-29 14:41:48 +00:00
wa_cve_2022_23960.h	fix(security): apply SMCCC_ARCH_WORKAROUND_3 to A73/A75/A72/A57	2022-03-18 01:01:34 +02:00