John Powell a4c394561a fix(amu): limit virtual offset register access to NS world ... Previously the SCR_EL3.AMVOFFEN bit was set for all contexts, this behavior is incorrect as it allows secure world to access the virtual offset registers when it should not be able to. This patch only sets AMVOFFEN for non-secure world. Signed-off-by: John Powell <john.powell@arm.com> Change-Id: I2c61fe0a8a0092df089f1cb2c0d8a45c8c8ad0d3		2022-04-28 20:30:42 +02:00
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amu	fix(amu): limit virtual offset register access to NS world	2022-04-28 20:30:42 +02:00
mpam	refactor(mpam): remove initialization of EL2 registers when EL2 is used	2022-04-12 17:41:51 +02:00
mtpmu	Add support for FEAT_MTPMU for Armv8.6	2020-12-11 12:49:20 +00:00
pauth	TF-A: Add support for ARMv8.3-PAuth in BL1 SMC calls and BL2U	2019-10-03 14:43:55 +01:00
ras	lib/extensions/ras: fix bug of binary search	2021-01-14 09:27:16 +08:00
sme	feat(sme): enable SME functionality	2021-11-12 10:38:00 -06:00
spe	feat(spe): add support for FEAT_SPEv1p2	2022-02-10 09:30:13 +00:00
sve	feat(sme): enable SME functionality	2021-11-12 10:38:00 -06:00
sys_reg_trace	feat(sys_reg_trace): enable trace system registers access from lower NS ELs	2021-08-26 09:29:51 +01:00
trbe	feat(trbe): enable access to trace buffer control registers from lower NS EL	2021-08-26 09:29:39 +01:00
trf	feat(trf): enable trace filter control register access from lower NS EL	2021-08-26 09:32:35 +01:00