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https://github.com/ARM-software/arm-trusted-firmware.git
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a24b53e0e5
This patch mainly initializes the SPM and provides common APIs for SPM to enable the use of its various features. Signed-off-by: Wenzhen Yu <wenzhen.yu@mediatek.com> Change-Id: I9facb6bf9962bb2d5fcacd945846bfaeb4c87a55
91 lines
2.6 KiB
C
91 lines
2.6 KiB
C
/*
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* Copyright (c) 2025, Mediatek Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef MT_SPM_CONSTRAINT_H
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#define MT_SPM_CONSTRAINT_H
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#include <lpm_v2/mt_lp_rm.h>
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#define MT_RM_CONSTRAINT_ALLOW_CPU_BUCK_OFF BIT(0)
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#define MT_RM_CONSTRAINT_ALLOW_DRAM_S0 BIT(1)
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#define MT_RM_CONSTRAINT_ALLOW_DRAM_S1 BIT(2)
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#define MT_RM_CONSTRAINT_ALLOW_VCORE_LP BIT(3)
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#define MT_RM_CONSTRAINT_ALLOW_INFRA_PDN BIT(4)
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#define MT_RM_CONSTRAINT_ALLOW_BUS26M_OFF BIT(5)
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#define MT_RM_CONSTRAINT_ALLOW_AP_SUSPEND BIT(6) /* System suspend */
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#define MT_RM_CONSTRAINT_ALLOW_BBLPM BIT(7)
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#define MT_RM_CONSTRAINT_ALLOW_XO_UFS BIT(8)
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#define MT_RM_CONSTRAINT_ALLOW_GPS_STATE BIT(9)
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#define MT_RM_CONSTRAINT_ALLOW_LVTS_STATE BIT(10)
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#define MT_RM_CONSTRAINT_ALLOW_AP_PLAT_SUSPEND BIT(11) /* Kernel suspend */
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#define MT_RM_CONSTRAINT_ALLOW_VCORE_OFF BIT(12)
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#define MT_SPM_RC_INVALID 0x0
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#define MT_SPM_RC_VALID_SW BIT(0)
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#define MT_SPM_RC_VALID_FW BIT(1)
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#define MT_SPM_RC_VALID_RESIDNECY BIT(2)
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#define MT_SPM_RC_VALID_COND_CHECK BIT(3)
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#define MT_SPM_RC_VALID_COND_LATCH BIT(4)
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#define MT_SPM_RC_VALID_UFS_H8 BIT(5)
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#define MT_SPM_RC_VALID_FLIGHTMODE BIT(6)
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#define MT_SPM_RC_VALID_XSOC_BBLPM BIT(7)
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#define MT_SPM_RC_VALID_TRACE_EVENT BIT(8)
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#define MT_SPM_RC_VALID_TRACE_TIME BIT(9)
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#define MT_SPM_RC_VALID_NOTIFY BIT(10)
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#define MT_SPM_RC_VALID (MT_SPM_RC_VALID_SW | MT_SPM_RC_VALID_FW)
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#define IS_MT_RM_RC_READY(status) \
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((status & MT_SPM_RC_VALID) == MT_SPM_RC_VALID)
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struct constraint_status {
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uint16_t id;
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uint16_t is_valid;
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uint64_t is_cond_block;
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uint32_t enter_cnt;
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uint64_t all_pll_dump;
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unsigned long long residency;
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struct mt_spm_cond_tables *cond_res;
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};
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enum constraint_status_update_type {
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CONSTRAINT_UPDATE_VALID,
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CONSTRAINT_UPDATE_COND_CHECK,
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CONSTRAINT_RESIDNECY,
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};
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enum constraint_status_get_type {
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CONSTRAINT_GET_VALID = 0xD0000000,
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CONSTRAINT_GET_ENTER_CNT,
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CONSTRAINT_GET_RESIDENCY,
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CONSTRAINT_GET_COND_EN,
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CONSTRAINT_COND_BLOCK,
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CONSTRAINT_GET_COND_BLOCK_LATCH,
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CONSTRAINT_GET_COND_BLOCK_DETAIL,
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CONSTRAINT_GET_RESIDNECY,
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};
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struct rc_common_state {
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unsigned int id;
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unsigned int act;
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unsigned int type;
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void *value;
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};
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#define MT_SPM_RC_BBLPM_MODE (MT_SPM_RC_VALID_UFS_H8 | \
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MT_SPM_RC_VALID_FLIGHTMODE | \
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MT_SPM_RC_VALID_XSOC_BBLPM)
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#define IS_MT_SPM_RC_BBLPM_MODE(st) \
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((st & (MT_SPM_RC_BBLPM_MODE)) == MT_SPM_RC_BBLPM_MODE)
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#define IS_MT_SPM_RC_NOTIFY_ENABLE(st) \
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((st & (MT_SPM_RC_VALID_NOTIFY)))
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#define MT_SPM_RC_EXTERN_STATUS_SET(v, st) ({v |= (st & 0xffff); })
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#define MT_SPM_RC_EXTERN_STATUS_CLR(v, st) ({v &= ~(st & 0xffff); })
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#endif /* MT_SPM_CONSTRAINT_H */
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