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Implement firmware handoff from BL2 to BL33 on qemu platform compliant to Firmware handoff specification v0.9. Change-Id: Id8d5206a71ef6ec97cf3c97995de328ebf0600cc Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
192 lines
4.1 KiB
C
192 lines
4.1 KiB
C
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/*
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* Copyright (c) 2015-2023, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <platform_def.h>
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#include <arch_helpers.h>
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#include <common/bl_common.h>
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#include <lib/xlat_tables/xlat_tables_v2.h>
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#include <services/el3_spmc_ffa_memory.h>
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#include <plat/common/platform.h>
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#include "qemu_private.h"
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#define MAP_DEVICE0 MAP_REGION_FLAT(DEVICE0_BASE, \
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DEVICE0_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#ifdef DEVICE1_BASE
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#define MAP_DEVICE1 MAP_REGION_FLAT(DEVICE1_BASE, \
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DEVICE1_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#endif
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#ifdef DEVICE2_BASE
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#define MAP_DEVICE2 MAP_REGION_FLAT(DEVICE2_BASE, \
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DEVICE2_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#endif
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#define MAP_SHARED_RAM MAP_REGION_FLAT(SHARED_RAM_BASE, \
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SHARED_RAM_SIZE, \
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MT_DEVICE | MT_RW | MT_SECURE)
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#define MAP_BL32_MEM MAP_REGION_FLAT(BL32_MEM_BASE, BL32_MEM_SIZE, \
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MT_MEMORY | MT_RW | MT_SECURE)
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#define MAP_NS_DRAM0 MAP_REGION_FLAT(NS_DRAM0_BASE, NS_DRAM0_SIZE, \
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MT_MEMORY | MT_RW | MT_NS)
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#define MAP_FLASH0 MAP_REGION_FLAT(QEMU_FLASH0_BASE, QEMU_FLASH0_SIZE, \
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MT_MEMORY | MT_RO | MT_SECURE)
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#define MAP_FLASH1 MAP_REGION_FLAT(QEMU_FLASH1_BASE, QEMU_FLASH1_SIZE, \
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MT_MEMORY | MT_RO | MT_SECURE)
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#ifdef FW_HANDOFF_BASE
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#define MAP_FW_HANDOFF MAP_REGION_FLAT(FW_HANDOFF_BASE, FW_HANDOFF_SIZE, \
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MT_MEMORY | MT_RW | MT_SECURE)
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#endif
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#ifdef FW_NS_HANDOFF_BASE
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#define MAP_FW_NS_HANDOFF MAP_REGION_FLAT(FW_NS_HANDOFF_BASE, FW_HANDOFF_SIZE, \
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MT_MEMORY | MT_RW | MT_NS)
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#endif
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/*
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* Table of regions for various BL stages to map using the MMU.
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* This doesn't include TZRAM as the 'mem_layout' argument passed to
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* arm_configure_mmu_elx() will give the available subset of that,
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*/
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#ifdef IMAGE_BL1
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static const mmap_region_t plat_qemu_mmap[] = {
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MAP_FLASH0,
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MAP_FLASH1,
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MAP_SHARED_RAM,
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MAP_DEVICE0,
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#ifdef MAP_DEVICE1
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MAP_DEVICE1,
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#endif
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#ifdef MAP_DEVICE2
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MAP_DEVICE2,
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#endif
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{0}
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};
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#endif
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#ifdef IMAGE_BL2
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static const mmap_region_t plat_qemu_mmap[] = {
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MAP_FLASH0,
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MAP_FLASH1,
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MAP_SHARED_RAM,
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MAP_DEVICE0,
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#ifdef MAP_DEVICE1
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MAP_DEVICE1,
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#endif
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#ifdef MAP_DEVICE2
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MAP_DEVICE2,
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#endif
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MAP_NS_DRAM0,
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#if SPM_MM
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QEMU_SP_IMAGE_MMAP,
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#else
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MAP_BL32_MEM,
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#endif
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#ifdef MAP_FW_HANDOFF
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MAP_FW_HANDOFF,
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#endif
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{0}
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};
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#endif
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#ifdef IMAGE_BL31
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static const mmap_region_t plat_qemu_mmap[] = {
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MAP_SHARED_RAM,
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MAP_DEVICE0,
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#ifdef MAP_DEVICE1
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MAP_DEVICE1,
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#endif
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#ifdef MAP_DEVICE2
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MAP_DEVICE2,
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#endif
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#ifdef MAP_FW_HANDOFF
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MAP_FW_HANDOFF,
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#endif
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#ifdef MAP_FW_NS_HANDOFF
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MAP_FW_NS_HANDOFF,
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#endif
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#if SPM_MM
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MAP_NS_DRAM0,
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QEMU_SPM_BUF_EL3_MMAP,
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#elif !SPMC_AT_EL3
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MAP_BL32_MEM,
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#endif
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{0}
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};
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#endif
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#ifdef IMAGE_BL32
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static const mmap_region_t plat_qemu_mmap[] = {
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MAP_SHARED_RAM,
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MAP_DEVICE0,
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#ifdef MAP_DEVICE1
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MAP_DEVICE1,
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#endif
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#ifdef MAP_DEVICE2
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MAP_DEVICE2,
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#endif
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{0}
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};
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#endif
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/*******************************************************************************
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* Returns QEMU platform specific memory map regions.
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******************************************************************************/
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const mmap_region_t *plat_qemu_get_mmap(void)
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{
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return plat_qemu_mmap;
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}
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#if MEASURED_BOOT || TRUSTED_BOARD_BOOT
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int plat_get_mbedtls_heap(void **heap_addr, size_t *heap_size)
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{
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return get_mbedtls_heap_helper(heap_addr, heap_size);
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}
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#endif
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#if SPMC_AT_EL3
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/*
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* When using the EL3 SPMC implementation allocate the datastore
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* for tracking shared memory descriptors in normal memory.
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*/
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#define PLAT_SPMC_SHMEM_DATASTORE_SIZE 64 * 1024
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uint8_t plat_spmc_shmem_datastore[PLAT_SPMC_SHMEM_DATASTORE_SIZE];
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int plat_spmc_shmem_datastore_get(uint8_t **datastore, size_t *size)
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{
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*datastore = plat_spmc_shmem_datastore;
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*size = PLAT_SPMC_SHMEM_DATASTORE_SIZE;
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return 0;
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}
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int plat_spmc_shmem_begin(struct ffa_mtd *desc)
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{
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return 0;
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}
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int plat_spmc_shmem_reclaim(struct ffa_mtd *desc)
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{
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return 0;
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}
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#endif
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#if defined(SPD_spmd) && (SPMC_AT_EL3 == 0)
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/*
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* A dummy implementation of the platform handler for Group0 secure interrupt.
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*/
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int plat_spmd_handle_group0_interrupt(uint32_t intid)
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{
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(void)intid;
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return -1;
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}
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#endif /*defined(SPD_spmd) && (SPMC_AT_EL3 == 0)*/
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