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https://github.com/ARM-software/arm-trusted-firmware.git
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8620bd0b93
The toolchain refactor change introduces the `${toolchain}-${tool}-id`
variables, which provide identifiers for all of the toolchain tools used
by the build system. This change replaces the various conditions that
are in use to identify these tools based on the path with a standard set
of comparisons against these new identifier variables.
Change-Id: Ib60e592359fa6e415c19a012e68d660f87436ca7
Signed-off-by: Chris Kay <chris.kay@arm.com>
97 lines
2.6 KiB
Makefile
97 lines
2.6 KiB
Makefile
#
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# Copyright (c) 2015-2024, Arm Limited and Contributors. All rights reserved.
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# Copyright (c) 2020, NVIDIA Corporation. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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SOC_DIR := plat/nvidia/tegra/soc/${TARGET_SOC}
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# dump the state on crash console
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CRASH_REPORTING := 1
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$(eval $(call add_define,CRASH_REPORTING))
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# enable assert() for release/debug builds
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ENABLE_ASSERTIONS := 1
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PLAT_LOG_LEVEL_ASSERT := 50
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$(eval $(call add_define,PLAT_LOG_LEVEL_ASSERT))
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# enable dynamic memory mapping
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PLAT_XLAT_TABLES_DYNAMIC := 1
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$(eval $(call add_define,PLAT_XLAT_TABLES_DYNAMIC))
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# Enable exception handling at EL3
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EL3_EXCEPTION_HANDLING := 1
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GICV2_G0_FOR_EL3 := 1
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# Enable PSCI v1.0 extended state ID format
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PSCI_EXTENDED_STATE_ID := 1
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# code and read-only data should be put on separate memory pages
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SEPARATE_CODE_AND_RODATA := 1
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# do not use coherent memory
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USE_COHERENT_MEM := 0
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# enable D-cache early during CPU warmboot
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WARMBOOT_ENABLE_DCACHE_EARLY := 1
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# remove the standard libc
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OVERRIDE_LIBC := 1
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# Flag to enable WDT FIQ interrupt handling for Tegra SoCs
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# prior to Tegra186
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ENABLE_TEGRA_WDT_LEGACY_FIQ_HANDLING ?= 0
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# Flag to allow relocation of BL32 image to TZDRAM during boot
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RELOCATE_BL32_IMAGE ?= 0
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# Enable stack protection
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ENABLE_STACK_PROTECTOR := strong
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# Enable SDEI
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SDEI_SUPPORT := 1
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# modify BUILD_PLAT to point to SoC specific build directory
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BUILD_PLAT := ${BUILD_BASE}/${PLAT}/${TARGET_SOC}/${BUILD_TYPE}
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include plat/nvidia/tegra/common/tegra_common.mk
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include ${SOC_DIR}/platform_${TARGET_SOC}.mk
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$(eval $(call add_define,ENABLE_TEGRA_WDT_LEGACY_FIQ_HANDLING))
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$(eval $(call add_define,RELOCATE_BL32_IMAGE))
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# platform cflags (enable signed comparisons, disable stdlib)
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TF_CFLAGS += -nostdlib
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# override with necessary libc files for the Tegra platform
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override LIBC_SRCS := $(addprefix lib/libc/, \
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aarch64/setjmp.S \
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assert.c \
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memchr.c \
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memcmp.c \
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memcpy.c \
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memmove.c \
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memset.c \
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printf.c \
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putchar.c \
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strrchr.c \
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strlen.c \
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snprintf.c)
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INCLUDES += -Iinclude/lib/libc \
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-Iinclude/lib/libc/$(ARCH) \
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ifeq ($($(ARCH)-ld-id),arm-link)
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# o suppress warnings for section mismatches, undefined symbols
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# o use only those libraries that are specified in the input file
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# list to resolve references
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# o create a static callgraph of functions
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# o resolve undefined symbols to el3_panic
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# o include only required sections
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TF_LDFLAGS += --diag_suppress=L6314,L6332 --no_scanlib --callgraph
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TF_LDFLAGS += --keep="*(.__pubsub*)" --keep="*(.rt_svc_descs*)" --keep="*(.cpu_ops)"
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ifeq (${ENABLE_PMF},1)
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TF_LDFLAGS += --keep="*(.pmf_svc_descs*)"
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endif
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endif
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