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This platform supports Allwinner's SoCs with ARMv8 cores. So far they all sport a single cluster of Cortex-A53 cores. "sunxi" is the original code name used for this platform, and since it appears in the Linux kernel and in U-Boot as well, we use it here as a short file name prefix and for identifiers. This port includes BL31 support only. U-Boot's SPL takes the role of the primary loader, also doing the DRAM initialization. It then loads the rest of the firmware, namely ATF and U-Boot (BL33), then hands execution over to ATF. This commit includes the basic platform code shared across all SoCs. There is no platform.mk yet. [Andre: moved files into proper directories, supported RESET_TO_BL31, various clean ups and simplifications ] Signed-off-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Andre Przywara <andre.przywara@arm.com>
49 lines
1 KiB
ArmAsm
49 lines
1 KiB
ArmAsm
/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch.h>
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#include <asm_macros.S>
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#include <sunxi_def.h>
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#include <sunxi_mmap.h>
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.globl plat_crash_console_init
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.globl plat_crash_console_putc
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.globl plat_crash_console_flush
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.globl plat_my_core_pos
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.globl platform_mem_init
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.globl plat_report_exception
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func plat_crash_console_init
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mov_imm x0, SUNXI_UART0_BASE
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mov_imm x1, SUNXI_UART0_CLK_IN_HZ
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mov_imm x2, SUNXI_UART0_BAUDRATE
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b console_16550_core_init
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endfunc plat_crash_console_init
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func plat_crash_console_putc
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mov_imm x1, SUNXI_UART0_BASE
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b console_16550_core_putc
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endfunc plat_crash_console_putc
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func plat_crash_console_flush
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ret
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endfunc plat_crash_console_flush
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func plat_my_core_pos
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mrs x0, mpidr_el1
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and x1, x0, #MPIDR_CLUSTER_MASK
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and x0, x0, #MPIDR_CPU_MASK
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add x0, x0, x1, LSR #6
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ret
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endfunc plat_my_core_pos
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func platform_mem_init
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ret
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endfunc platform_mem_init
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func plat_report_exception
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ret
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endfunc plat_report_exception
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