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27dd11dbf5
BL31 will need to access a device tree for several configurations (UART, GIC, OTP mapping...). Create a BL31 device tree (SOC_FW_CONFIG). It is loaded in DDR, in a spare area. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Change-Id: I320a05859e1aa3dd8db9a274e7201075a8c250c2
42 lines
755 B
Text
42 lines
755 B
Text
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-3-Clause)
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/*
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* Copyright (c) 2024, STMicroelectronics - All Rights Reserved
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*/
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#include <common/tbbr/tbbr_img_def.h>
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#include <platform_def.h>
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/dts-v1/;
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/ {
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dtb-registry {
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compatible = "fconf,dyn_cfg-dtb_registry";
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hw-config {
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load-address = <0x0 STM32MP_HW_CONFIG_BASE>;
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max-size = <STM32MP_HW_CONFIG_MAX_SIZE>;
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id = <HW_CONFIG_ID>;
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};
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nt_fw {
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load-address = <0x0 STM32MP_BL33_BASE>;
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max-size = <STM32MP_BL33_MAX_SIZE>;
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id = <BL33_IMAGE_ID>;
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};
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soc_fw {
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load-address = <0x0 STM32MP_SYSRAM_BASE>;
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max-size = <STM32MP_BL31_SIZE>;
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id = <BL31_IMAGE_ID>;
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};
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soc_fw-config {
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id = <SOC_FW_CONFIG_ID>;
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};
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tos_fw {
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id = <BL32_IMAGE_ID>;
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};
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};
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};
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