mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-07 21:33:54 +00:00
27dd11dbf5
BL31 will need to access a device tree for several configurations (UART, GIC, OTP mapping...). Create a BL31 device tree (SOC_FW_CONFIG). It is loaded in DDR, in a spare area. Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Signed-off-by: Maxime Méré <maxime.mere@foss.st.com> Change-Id: I320a05859e1aa3dd8db9a274e7201075a8c250c2
39 lines
1.1 KiB
Text
39 lines
1.1 KiB
Text
// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause)
|
|
/*
|
|
* Copyright (C) 2023-2024, STMicroelectronics - All Rights Reserved
|
|
*/
|
|
|
|
/ {
|
|
soc@0 {
|
|
#if !STM32MP_EMMC && !STM32MP_SDMMC
|
|
rifsc@42080000 {
|
|
/delete-node/ mmc@48220000;
|
|
/delete-node/ mmc@48230000;
|
|
};
|
|
#endif
|
|
};
|
|
|
|
/*
|
|
* UUID's here are UUID RFC 4122 compliant meaning fieds are stored in
|
|
* network order (big endian)
|
|
*/
|
|
|
|
st-io_policies {
|
|
fip-handles {
|
|
compatible = "st,io-fip-handle";
|
|
#if STM32MP_DDR_FIP_IO_STORAGE
|
|
ddr_fw_uuid = "b11249be-92dd-4b10-867c-2c6a4b47a7fb";
|
|
#endif
|
|
fw_cfg_uuid = "5807e16a-8459-47be-8ed5-648e8dddab0e";
|
|
bl31_uuid = "47d4086d-4cfe-9846-9b95-2950cbbd5a00";
|
|
bl32_uuid = "05d0e189-53dc-1347-8d2b-500a4b7a3e38";
|
|
bl32_extra1_uuid = "0b70c29b-2a5a-7840-9f65-0a5682738288";
|
|
bl32_extra2_uuid = "8ea87bb1-cfa2-3f4d-85fd-e7bba50220d9";
|
|
bl33_uuid = "d6d0eea7-fcea-d54b-9782-9934f234b6e4";
|
|
hw_cfg_uuid = "08b8f1d9-c9cf-9349-a962-6fbc6b7265cc";
|
|
soc_fw_cfg_uuid = "9979814b-0376-fb46-8c8e-8d267f7859e0";
|
|
tos_fw_cfg_uuid = "26257c1a-dbc6-7f47-8d96-c4c4b0248021";
|
|
nt_fw_cfg_uuid = "28da9815-93e8-7e44-ac66-1aaf801550f9";
|
|
};
|
|
};
|
|
};
|