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https://github.com/ARM-software/arm-trusted-firmware.git
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6bcbe43790
Add support for Morello I2S audio subsystem. This includes adding the audio formatter and I2S transmitter nodes and gluing them together with the hdmi codec using a simple sound card machine node. Change-Id: I3de4b06ef965c8e0555d074118b944fe6b4b78bb Signed-off-by: Anurag Koul <anurag.koul@arm.com> Signed-off-by: Faiz Abbas <faiz.abbas@arm.com>
113 lines
2.4 KiB
Text
113 lines
2.4 KiB
Text
/*
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* Copyright (c) 2020-2023, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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/ {
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compatible = "arm,morello";
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interrupt-parent = <&gic>;
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#address-cells = <2>;
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#size-cells = <2>;
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aliases {
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serial0 = &soc_uart0;
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};
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gic: interrupt-controller@2c010000 {
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compatible = "arm,gic-v3";
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#address-cells = <2>;
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#interrupt-cells = <3>;
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#size-cells = <2>;
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ranges;
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interrupt-controller;
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};
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pmu {
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compatible = "arm,armv8-pmuv3";
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interrupts = <GIC_PPI 7 IRQ_TYPE_LEVEL_HIGH>;
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};
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spe-pmu {
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compatible = "arm,statistical-profiling-extension-v1";
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interrupts = <GIC_PPI 5 IRQ_TYPE_LEVEL_HIGH>;
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};
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psci {
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compatible = "arm,psci-0.2";
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method = "smc";
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};
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timer {
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compatible = "arm,armv8-timer";
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interrupts = <GIC_PPI 13 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 14 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 11 IRQ_TYPE_LEVEL_LOW>,
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<GIC_PPI 10 IRQ_TYPE_LEVEL_LOW>;
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};
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mailbox: mhu@45000000 {
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compatible = "arm,mhu-doorbell", "arm,primecell";
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reg = <0x0 0x45000000 0x0 0x1000>;
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interrupts = <GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "mhu_lpri_rx",
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"mhu_hpri_rx";
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#mbox-cells = <2>;
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mbox-name = "ARM-MHU";
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clocks = <&soc_refclk50mhz>;
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clock-names = "apb_pclk";
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};
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sram: sram@45200000 {
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compatible = "mmio-sram";
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reg = <0x0 0x06000000 0x0 0x8000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0 0x0 0x06000000 0x8000>;
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cpu_scp_hpri0: scp-sram@0 {
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compatible = "arm,scmi-shmem";
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reg = <0x0 0x80>;
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};
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cpu_scp_hpri1: scp-sram@80 {
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compatible = "arm,scmi-shmem";
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reg = <0x80 0x80>;
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};
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};
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soc_refclk50mhz: refclk50mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "apb_pclk";
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};
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soc_refclk85mhz: refclk85mhz {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <85000000>;
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clock-output-names = "iofpga:aclk";
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};
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soc_uartclk: uartclk {
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compatible = "fixed-clock";
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#clock-cells = <0>;
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clock-frequency = <50000000>;
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clock-output-names = "uartclk";
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};
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soc_uart0: serial@2a400000 {
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compatible = "arm,pl011", "arm,primecell";
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reg = <0x0 0x2a400000 0x0 0x1000>;
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interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&soc_uartclk>, <&soc_refclk50mhz>;
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clock-names = "uartclk", "apb_pclk";
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status = "okay";
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};
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};
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