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This patch performs the following: - Creating two corstone700 platforms under corstone700 board: fvp and fpga - Since the FVP and FPGA have IP differences, this commit provides a specific DTS for each platform - The platform can be specified using the TARGET_PLATFORM Makefile variable (possible values are: fvp or fpga) - Allowing to use u-boot by: - Enabling NEED_BL33 option - Fixing non-secure image base: For no preloaded bl33 we want to have the NS base set on shared ram. Setup a memory map region for NS in shared map and set the bl33 address in the area. - Setting the SYS_COUNTER_FREQ_IN_TICKS based on the selected platform - Setting ARM_MAP_SHARED_RAM and ARM_MAP_NS_SHARED_RAM to use MT_MEMORY Change-Id: I4c8ac3387acb1693ab617bcccab00d80e340c163 Signed-off-by: Rui Miguel Silva <rui.silva@linaro.org> Signed-off-by: Abdellatif El Khlifi <abdellatif.elkhlifi@arm.com>
40 lines
708 B
Text
40 lines
708 B
Text
/*
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* Copyright (c) 2020, Arm Limited. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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/dts-v1/;
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#include "corstone700.dtsi"
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/ {
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model = "corstone700-fvp";
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/*
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* Intel StrataFlash J3 NOR flash: 2 x 16-bit interleaved components
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* Flash total size: 32 MB
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* Allocated flash space: 8 MB
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*/
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flash@8500000 {
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compatible = "cfi-flash";
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reg = <0x8500000 0x800000>;
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bank-width = <4>;
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device-width= <2>;
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};
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ethernet: eth@4010000 {
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compatible = "smsc,lan91c111";
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reg = <0x40100000 0x10000>;
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phy-mode = "mii";
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interrupt-parent = <&gic>;
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interrupts = <GIC_SPI 116 0xf04>;
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reg-io-width = <2>;
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smsc,irq-push-pull;
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};
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};
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&refclk {
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clock-frequency = <50000000>;
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};
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