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b47d085a3b
ERR051700 erratum is present on all S32CC-based SoCs and relates to reset. Releasing multiple Software Resettable Domains (SRDs) from reset simultaneously, may cause a false error in the fault control unit. The workaround is to clear the SRD resets sequentially instead of simultaneously. Change-Id: I883bc223bf6834907259e6964a5702d7186e4c7f Signed-off-by: Alexandru-Catalin Ionita <alexandru-catalin.ionita@nxp.com> Signed-off-by: Ghennadi Procopciuc <ghennadi.procopciuc@nxp.com>
111 lines
4.2 KiB
ReStructuredText
111 lines
4.2 KiB
ReStructuredText
NXP S32G274A
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============
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S32G2 is an NXP vehicle network processor combining ASIL D safety, hardware
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security, high-performance real-time and application processing and network
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acceleration. S32G2 supports the needs of new vehicle architectures:
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service-oriented gateways, domain controllers, zonal processors, safety
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processors and more. It is equipped with 4 Cortex-A53 cores operating at
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1.0GHz.
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The TF-A includes support for one single S32G2-based board called S32G274ARDB2.
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The S32G-VNP-RDB2 is a compact, highly optimized and integrated board
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engineering for vehicle service-oriented gateway (SoG), domain control
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applications, high-performance processing, safety and security applications.
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More details about this board can be found at `s32g274ardb2`_.
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Boot Flow
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---------
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::
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BootROM -> BL2 (SRAM) -> BL31 (SRAM) -> BL33 (DDR - TODO)
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.. warning::
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This boot flow is a preliminary version that will serve as a foundation for
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upcoming S32G2 contributions. The execution will hang after the BL31 stage
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due to U-Boot being deployed in SRAM instead of DDR. This issue will be
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resolved with the addition of the DDR driver.
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Code Locations
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--------------
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- Downstream TF-A:
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`link: <https://github.com/nxp-auto-linux/arm-trusted-firmware>`__
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- Downstream U-Boot:
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`link <https://github.com/nxp-auto-linux/u-boot>`__
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- Downstream Linux:
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`link <https://github.com/nxp-auto-linux/linux>`__
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How to build
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------------
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The port currently available on the S32G274ARDB2 platform is in its initial
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stage. This means that important drivers like DDR and storage are not yet
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available. Consequently, the boot process depends on BootROM to load all TF-A
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stages in SRAM. To create a bootable image, the script below should be used.
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This script makes use of the ``mkimage`` tool, which is part of the U-Boot drop
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for S32G274A SoCs.
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.. code:: bash
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#!/bin/bash -xe
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TF_A="${TF_A:-`pwd`}"
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UBOOT="${UBOOT:-${TF_A}/../u-boot}"
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DEBUG="${DEBUG:-1}"
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FIP_BASE="0x34100000"
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if [ "${DEBUG}" -eq "1" ]; then
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BUILD="debug"
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else
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BUILD="release"
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fi
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BOOT_IMAGE="build/s32g274ardb2/${BUILD}/BOOT_IMAGE.bin"
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BL2_BIN="build/s32g274ardb2/${BUILD}/bl2.bin"
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FIP_BIN="build/s32g274ardb2/${BUILD}/fip.bin"
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# Generate bl2, bl31 and fip image
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make -C "${TF_A}" -j9 'PLAT=s32g274ardb2' \
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BL33="${UBOOT}/u-boot-nodtb.bin" DEBUG="${DEBUG}" clean
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make -C "${TF_A}" -j9 'PLAT=s32g274ardb2' \
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BL33="${UBOOT}/u-boot-nodtb.bin" DEBUG="${DEBUG}" bl2
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make -C "${TF_A}" -j9 'PLAT=s32g274ardb2' \
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BL33="${UBOOT}/u-boot-nodtb.bin" DEBUG="${DEBUG}" fip
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# Extract BL2 entry
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BL2_START="0x$(poetry run memory -p s32g274ardb2 -b debug -f | \
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grep BL2 | awk -F'|' '{print $3}' | xargs)"
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# BL2 bin file size in bytes
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BL2_SIZE="$(stat -c "%s" "${BL2_BIN}")"
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# Pack bl2.bin and fip.bin by ensuring that the FIP image will start at FIP_BASE
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cp -vf "${BL2_BIN}" "${BOOT_IMAGE}"
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dd if="${FIP_BIN}" of="${BOOT_IMAGE}" seek="$((FIP_BASE - BL2_START))" bs=1
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# Build a bootable image by appending the IVT
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"${UBOOT}/tools/mkimage" \
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-a "${BL2_START}" \
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-e "${BL2_START}" \
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-T s32ccimage \
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-n "${UBOOT}/u-boot-s32.cfgout" \
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-d "${BOOT_IMAGE}" \
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fip.s32
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SoC Errata Workarounds
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----------------------
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The S32G274A port of the TF-A includes compilation flags that can be used to
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control the workaround for the SoC. These flags are used similarly to how the
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:ref:`arm_cpu_macros_errata_workarounds` are used. The list of workarounds
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includes the following switches:
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- ``ERRATA_S32_051700``: This applies erratum ERR051700 workaround to
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SoCs part of the S32 Common Chassis family, and therefore it needs to
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be enabled for the S32G and S32R devices.
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.. _s32g2: https://www.nxp.com/products/processors-and-microcontrollers/s32-automotive-platform/s32g-vehicle-network-processors/s32g2-processors-for-vehicle-networking:S32G2
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.. _s32g274ardb2: https://www.nxp.com/design/design-center/designs/s32g2-vehicle-networking-reference-design:S32G-VNP-RDB2
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