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New SoC is a78 based with gicv3 and uart over pl011. Communication interfaces are similar to Versal NET platform. System starts with AMD PLM firmware which loads TF-A(bl31) to memory, which is already configured, and jumps to it. PLM also prepare handoff structure for TF-A with information what components were load and flags which indicate which EL level SW should be started. Change-Id: I5065b1b7ec4ee58e77dc4096747758480c84009c Signed-off-by: Amit Nagal <amit.nagal@amd.com> Signed-off-by: Akshay Belsare <akshay.belsare@amd.com> Signed-off-by: Michal Simek <michal.simek@amd.com>
87 lines
3.5 KiB
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87 lines
3.5 KiB
ReStructuredText
AMD Versal Gen 2
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================
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Trusted Firmware-A implements the EL3 firmware layer for AMD Versal Gen 2.
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The platform only uses the runtime part of TF-A as AMD Versal Gen 2 already
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has a BootROM (BL1) and PMC FW (BL2).
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BL31 is TF-A.
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BL32 is an optional Secure Payload.
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BL33 is the non-secure world software (U-Boot, Linux etc).
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To build:
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```bash
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal2 bl31
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```
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To build TF-A for JTAG DCC console:
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```bash
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal2 CONSOLE=dcc bl31
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```
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To build TF-A with Errata management interface
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```bash
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal2 bl31 ERRATA_ABI_SUPPORT=1
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```
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To build TF-A with IPI CRC check:
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```bash
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make RESET_TO_BL31=1 CROSS_COMPILE=aarch64-none-elf- PLAT=versal2 bl31 IPI_CRC_CHECK=1
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```
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AMD Versal Gen 2 platform specific build options
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-------------------------------------------------
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* `MEM_BASE`: Specifies the base address of the bl31 binary.
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* `MEM_SIZE`: Specifies the size of the memory region of the bl31 binary.
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* `BL32_MEM_BASE`: Specifies the base address of the bl32 binary.
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* `BL32_MEM_SIZE`: Specifies the size of the memory region of the bl32 binary.
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* `CONSOLE`: Select the console driver. Options:
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- `pl011`, `pl011_0`: ARM pl011 UART 0 (default)
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- `pl011_1` : ARM pl011 UART 1
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- `dcc` : JTAG Debug Communication Channel(DCC)
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Reference DEN0028E SMC calling convention
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------------------------------------------
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Allocated subranges of Function Identifier to SIP services
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------------------------------------------------------------
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+-----------------------+-------------------------------------------------------+
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| SMC Function | Identifier Service type |
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+-----------------------+-------------------------------------------------------+
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| 0xC2000000-0xC200FFFF | Fast SMC64 SiP Service Calls as per SMCCC Section 6.1 |
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+-----------------------+-------------------------------------------------------+
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IPI SMC call ranges
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-------------------
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+---------------------------+-----------------------------------------------------------+
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| SMC Function Identifier | Service type |
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+---------------------------+-----------------------------------------------------------+
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| 0xc2001000-0xc2001FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx IPI |
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+---------------------------+-----------------------------------------------------------+
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PM SMC call ranges
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------------------
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+---------------------------+---------------------------------------------------------------------------+
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| SMC Function Identifier | Service type |
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+---------------------------+---------------------------------------------------------------------------+
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| 0xc2000000-0xc2000FFF | Fast SMC64 SiP Service call range used for AMD-Xilinx Platform Management |
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+---------------------------+---------------------------------------------------------------------------+
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SMC function IDs for SiP Service queries
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----------------------------------------
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+--------------+--------------+--------------+
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| Service | Call UID | Revision |
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+--------------+--------------+--------------+
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| SiP Service | 0x8200_FF01 | 0x8200_FF03 |
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+--------------+--------------+--------------+
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Call UID Query – Returns a unique identifier of the service provider.
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Revision Query – Returns revision details of the service implementor.
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