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c3cf06f1a3
All identifiers, regardless of use, that start with two underscores are reserved. This means they can't be used in header guards. The style that this project is now to use the full name of the file in capital letters followed by 'H'. For example, for a file called "uart_example.h", the header guard is UART_EXAMPLE_H. The exceptions are files that are imported from other projects: - CryptoCell driver - dt-bindings folders - zlib headers Change-Id: I50561bf6c88b491ec440d0c8385c74650f3c106e Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
135 lines
4 KiB
C
135 lines
4 KiB
C
/*
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* Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef EP_INFO_H
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#define EP_INFO_H
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#include <param_header.h>
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#include <utils_def.h>
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#define SECURE U(0x0)
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#define NON_SECURE U(0x1)
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#define sec_state_is_valid(s) (((s) == SECURE) || ((s) == NON_SECURE))
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/*******************************************************************************
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* Constants that allow assembler code to access members of and the
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* 'entry_point_info' structure at their correct offsets.
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******************************************************************************/
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#define ENTRY_POINT_INFO_PC_OFFSET U(0x08)
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#ifdef AARCH32
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#define ENTRY_POINT_INFO_LR_SVC_OFFSET U(0x10)
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#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x14)
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#else
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#define ENTRY_POINT_INFO_ARGS_OFFSET U(0x18)
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#endif
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/* The following are used to set/get image attributes. */
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#define PARAM_EP_SECURITY_MASK U(0x1)
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/* Secure or Non-secure image */
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#define GET_SECURITY_STATE(x) ((x) & PARAM_EP_SECURITY_MASK)
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#define SET_SECURITY_STATE(x, security) \
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((x) = ((x) & ~PARAM_EP_SECURITY_MASK) | (security))
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/* Endianness of the image. */
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#define EP_EE_MASK U(0x2)
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#define EP_EE_SHIFT U(1)
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#define EP_EE_LITTLE U(0x0)
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#define EP_EE_BIG U(0x2)
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#define EP_GET_EE(x) ((x) & EP_EE_MASK)
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#define EP_SET_EE(x, ee) ((x) = ((x) & ~EP_EE_MASK) | (ee))
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/* Enable or disable access to the secure timer from secure images. */
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#define EP_ST_MASK U(0x4)
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#define EP_ST_DISABLE U(0x0)
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#define EP_ST_ENABLE U(0x4)
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#define EP_GET_ST(x) ((x) & EP_ST_MASK)
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#define EP_SET_ST(x, ee) ((x) = ((x) & ~EP_ST_MASK) | (ee))
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/* Determine if an image is executable or not. */
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#define EP_EXE_MASK U(0x8)
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#define NON_EXECUTABLE U(0x0)
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#define EXECUTABLE U(0x8)
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#define EP_GET_EXE(x) ((x) & EP_EXE_MASK)
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#define EP_SET_EXE(x, ee) ((x) = ((x) & ~EP_EXE_MASK) | (ee))
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/* Flag to indicate the first image that is executed. */
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#define EP_FIRST_EXE_MASK U(0x10)
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#define EP_FIRST_EXE U(0x10)
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#define EP_GET_FIRST_EXE(x) ((x) & EP_FIRST_EXE_MASK)
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#define EP_SET_FIRST_EXE(x, ee) ((x) = ((x) & ~EP_FIRST_EXE_MASK) | (ee))
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#ifndef __ASSEMBLY__
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#include <cassert.h>
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#include <stdint.h>
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typedef struct aapcs64_params {
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u_register_t arg0;
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u_register_t arg1;
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u_register_t arg2;
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u_register_t arg3;
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u_register_t arg4;
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u_register_t arg5;
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u_register_t arg6;
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u_register_t arg7;
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} aapcs64_params_t;
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typedef struct aapcs32_params {
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u_register_t arg0;
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u_register_t arg1;
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u_register_t arg2;
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u_register_t arg3;
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} aapcs32_params_t;
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/*****************************************************************************
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* This structure represents the superset of information needed while
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* switching exception levels. The only two mechanisms to do so are
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* ERET & SMC. Security state is indicated using bit zero of header
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* attribute
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* NOTE: BL1 expects entrypoint followed by spsr at an offset from the start
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* of this structure defined by the macro `ENTRY_POINT_INFO_PC_OFFSET` while
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* processing SMC to jump to BL31.
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*****************************************************************************/
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typedef struct entry_point_info {
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param_header_t h;
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uintptr_t pc;
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uint32_t spsr;
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#ifdef AARCH32
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uintptr_t lr_svc;
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aapcs32_params_t args;
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#else
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aapcs64_params_t args;
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#endif
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} entry_point_info_t;
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/*
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* Compile time assertions related to the 'entry_point_info' structure to
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* ensure that the assembler and the compiler view of the offsets of
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* the structure members is the same.
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*/
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CASSERT(ENTRY_POINT_INFO_PC_OFFSET ==
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__builtin_offsetof(entry_point_info_t, pc), \
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assert_BL31_pc_offset_mismatch);
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#ifdef AARCH32
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CASSERT(ENTRY_POINT_INFO_LR_SVC_OFFSET ==
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__builtin_offsetof(entry_point_info_t, lr_svc),
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assert_entrypoint_lr_offset_error);
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#endif
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CASSERT(ENTRY_POINT_INFO_ARGS_OFFSET == \
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__builtin_offsetof(entry_point_info_t, args), \
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assert_BL31_args_offset_mismatch);
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CASSERT(sizeof(uintptr_t) ==
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__builtin_offsetof(entry_point_info_t, spsr) - \
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__builtin_offsetof(entry_point_info_t, pc), \
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assert_entrypoint_and_spsr_should_be_adjacent);
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#endif /*__ASSEMBLY__*/
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#endif /* EP_INFO_H */
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