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Use CREATE_SEQ helper macro to create sequence of valid chip counts instead of manually creating the sequence. This allows a scalable approach to increase the valid chip count sequence in the future. Change-Id: I5ca7a00460325c156b9e9e52b2bf656a2e43f82d Signed-off-by: Vijayenthiran Subramaniam <vijayenthiran.subramaniam@arm.com>
60 lines
1.9 KiB
Makefile
60 lines
1.9 KiB
Makefile
#
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# Copyright (c) 2018-2020, ARM Limited and Contributors. All rights reserved.
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#
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# SPDX-License-Identifier: BSD-3-Clause
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#
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include plat/arm/css/sgi/sgi-common.mk
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RDN1EDGE_BASE = plat/arm/board/rdn1edge
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PLAT_INCLUDES += -I${RDN1EDGE_BASE}/include/
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SGI_CPU_SOURCES := lib/cpus/aarch64/neoverse_n1.S
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BL1_SOURCES += ${SGI_CPU_SOURCES} \
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${RDN1EDGE_BASE}/rdn1edge_err.c
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BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_plat.c \
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${RDN1EDGE_BASE}/rdn1edge_security.c \
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${RDN1EDGE_BASE}/rdn1edge_err.c \
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drivers/arm/tzc/tzc_dmc620.c \
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lib/utils/mem_region.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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BL31_SOURCES += ${SGI_CPU_SOURCES} \
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${RDN1EDGE_BASE}/rdn1edge_plat.c \
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${RDN1EDGE_BASE}/rdn1edge_topology.c \
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drivers/cfi/v2m/v2m_flash.c \
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drivers/arm/gic/v3/gic600_multichip.c \
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lib/utils/mem_region.c \
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plat/arm/common/arm_nor_psci_mem_protect.c
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ifeq (${TRUSTED_BOARD_BOOT}, 1)
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BL1_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_trusted_boot.c
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BL2_SOURCES += ${RDN1EDGE_BASE}/rdn1edge_trusted_boot.c
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endif
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# Enable dynamic addition of MMAP regions in BL31
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BL31_CFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC=1
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# Add the FDT_SOURCES and options for Dynamic Config
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FDT_SOURCES += ${RDN1EDGE_BASE}/fdts/${PLAT}_fw_config.dts
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TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb
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# Add the TB_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${TB_FW_CONFIG},--tb-fw-config))
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FDT_SOURCES += ${RDN1EDGE_BASE}/fdts/${PLAT}_nt_fw_config.dts
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NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb
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# Add the NT_FW_CONFIG to FIP and specify the same to certtool
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$(eval $(call TOOL_ADD_PAYLOAD,${NT_FW_CONFIG},--nt-fw-config))
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$(eval $(call CREATE_SEQ,SEQ,2))
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ifneq ($(CSS_SGI_CHIP_COUNT),$(filter $(CSS_SGI_CHIP_COUNT),$(SEQ)))
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$(error "Chip count for RDN1Edge platform should be one of $(SEQ), currently \
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set to ${CSS_SGI_CHIP_COUNT}.")
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endif
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override CTX_INCLUDE_AARCH32_REGS := 0
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