mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
synced 2025-04-07 21:33:54 +00:00
bbff267b6f
Certain erratum workarounds like Neoverse N1 1542419, need a part of their mitigation done in EL3 and the rest in lower EL. But currently such workarounds return HIGHER_EL_MITIGATION which indicates that the erratum has already been mitigated by a higher EL(EL3 in this case) which causes the lower EL to not apply it's part of the mitigation. This patch fixes this issue by adding support for split workarounds so that on certain errata we return AFFECTED even though EL3 has applied it's workaround. This is done by reusing the chosen field of erratum_entry structure into a bitfield that has two bitfields - Bit 0 indicates that the erratum has been enabled in build, Bit 1 indicates that the erratum is a split workaround and should return AFFECTED instead of HIGHER_EL_MITIGATION. SDEN documentation: https://developer.arm.com/documentation/SDEN885747/latest Signed-off-by: Arvind Ram Prakash <arvind.ramprakash@arm.com> Change-Id: Iec94d665b5f55609507a219a7d1771eb75e7f4a7
112 lines
2.9 KiB
C
112 lines
2.9 KiB
C
/*
|
|
* Copyright (c) 2017-2025, Arm Limited and Contributors. All rights reserved.
|
|
*
|
|
* SPDX-License-Identifier: BSD-3-Clause
|
|
*/
|
|
|
|
#ifndef ERRATA_H
|
|
#define ERRATA_H
|
|
|
|
#include <lib/cpus/cpu_ops.h>
|
|
|
|
#define ERRATUM_CHECK_FUNC_SIZE CPU_WORD_SIZE
|
|
#define ERRATUM_ID_SIZE 4
|
|
#define ERRATUM_CVE_SIZE 2
|
|
#define ERRATUM_CHOSEN_SIZE 1
|
|
#define ERRATUM_ALIGNMENT_SIZE 1
|
|
|
|
#define ERRATUM_CHECK_FUNC 0
|
|
#define ERRATUM_ID ERRATUM_CHECK_FUNC + ERRATUM_CHECK_FUNC_SIZE
|
|
#define ERRATUM_CVE ERRATUM_ID + ERRATUM_ID_SIZE
|
|
#define ERRATUM_CHOSEN ERRATUM_CVE + ERRATUM_CVE_SIZE
|
|
#define ERRATUM_ALIGNMENT ERRATUM_CHOSEN + ERRATUM_CHOSEN_SIZE
|
|
#define ERRATUM_ENTRY_SIZE ERRATUM_ALIGNMENT + ERRATUM_ALIGNMENT_SIZE
|
|
|
|
/* Errata status */
|
|
#define ERRATA_NOT_APPLIES 0
|
|
#define ERRATA_APPLIES 1
|
|
#define ERRATA_MISSING 2
|
|
|
|
#ifndef __ASSEMBLER__
|
|
#include <lib/cassert.h>
|
|
|
|
void print_errata_status(void);
|
|
|
|
/*
|
|
* NOTE that this structure will be different on AArch32 and AArch64. The
|
|
* uintptr_t will reflect the change and the alignment will be correct in both.
|
|
*/
|
|
struct erratum_entry {
|
|
uintptr_t (*check_func)(uint64_t cpu_rev);
|
|
/* Will fit CVEs with up to 10 character in the ID field */
|
|
uint32_t id;
|
|
/* Denote CVEs with their year or errata with 0 */
|
|
uint16_t cve;
|
|
/*
|
|
* a bitfield:
|
|
* bit 0 - denotes if the erratum is enabled in build.
|
|
* bit 1 - denotes if the erratum workaround is split and
|
|
* also needs to be implemented at a lower EL.
|
|
*/
|
|
uint8_t chosen;
|
|
uint8_t _alignment;
|
|
} __packed;
|
|
|
|
CASSERT(sizeof(struct erratum_entry) == ERRATUM_ENTRY_SIZE,
|
|
assert_erratum_entry_asm_c_different_sizes);
|
|
|
|
/*
|
|
* Runtime errata helpers.
|
|
*/
|
|
#if ERRATA_A75_764081
|
|
bool errata_a75_764081_applies(void);
|
|
#else
|
|
static inline bool errata_a75_764081_applies(void)
|
|
{
|
|
return false;
|
|
}
|
|
#endif
|
|
|
|
#if ERRATA_A520_2938996 || ERRATA_X4_2726228
|
|
unsigned int check_if_affected_core(void);
|
|
#endif
|
|
|
|
int check_wa_cve_2024_7881(void);
|
|
bool errata_ich_vmcr_el2_applies(void);
|
|
|
|
#else
|
|
|
|
/*
|
|
* errata framework macro helpers
|
|
*
|
|
* NOTE an erratum and CVE id could clash. However, both numbers are very large
|
|
* and the probablity is minuscule. Working around this makes code very
|
|
* complicated and extremely difficult to read so it is not considered. In the
|
|
* unlikely event that this does happen, prepending the CVE id with a 0 should
|
|
* resolve the conflict
|
|
*/
|
|
#define ERRATUM(id) 0, id
|
|
#define CVE(year, id) year, id
|
|
#define NO_ISB 1
|
|
#define NO_ASSERT 0
|
|
#define NO_APPLY_AT_RESET 0
|
|
#define APPLY_AT_RESET 1
|
|
#define GET_CPU_REV 1
|
|
#define NO_GET_CPU_REV 0
|
|
|
|
/* useful for errata that end up always being worked around */
|
|
#define ERRATUM_ALWAYS_CHOSEN 1
|
|
|
|
#endif /* __ASSEMBLER__ */
|
|
|
|
/* Macro to get CPU revision code for checking errata version compatibility. */
|
|
#define CPU_REV(r, p) ((r << 4) | p)
|
|
|
|
/* Used for errata that have split workaround */
|
|
#define SPLIT_WA 1
|
|
|
|
/* chosen bitfield entries */
|
|
#define WA_ENABLED_MASK BIT(0)
|
|
#define SPLIT_WA_MASK BIT(1)
|
|
|
|
#endif /* ERRATA_H */
|