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306551362c
This patch disables trapping to EL3 when the FEAT_D128 specific registers are accessed by setting the SCR_EL3.D128En bit. If FEAT_D128 is implemented, then FEAT_SYSREG128 is implemented. With FEAT_SYSREG128 certain system registers are treated as 128-bit, so we should be context saving and restoring 128-bits instead of 64-bit when FEAT_D128 is enabled. FEAT_SYSREG128 adds support for MRRS and MSRR instruction which helps us to read write to 128-bit system register. Refer to Arm Architecture Manual for further details. Change the FVP platform to default to handling this as a dynamic option so the right decision can be made by the code at runtime. Change-Id: I1a53db5eac29e56c8fbdcd4961ede3abfcb2411a Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com> Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>
30 lines
687 B
C
30 lines
687 B
C
/*
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* Copyright (c) 2024, Arm Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef PAR_H
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#define PAR_H
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#include<arch_features.h>
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#include<lib/extensions/sysreg128.h>
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static inline uint64_t get_par_el1_pa(sysreg_t par)
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{
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uint64_t pa = par & UINT64_MAX;
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/* PA, bits [51:12] is Output address */
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uint64_t mask = PAR_ADDR_MASK;
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#if ENABLE_FEAT_D128
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/* If D128 is in use, the PA is in the upper 64-bit word of PAR_EL1 */
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if (is_feat_d128_supported() && (par & PAR_EL1_D128)) {
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pa = (par >> 64) & UINT64_MAX;
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/* PA, bits [55:12] is Output address */
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mask = PAR_D128_ADDR_MASK;
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}
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#endif
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return pa & mask;
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}
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#endif /* PAR_H */
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