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890b508820
Add header file to help with creation of SPMD logical partitions. Also update linker files to create sections to record SPMD logical partitions declared. This follows the same pattern as the EL3 SPMC's logical partitions. This patch also adds initialization of SPMD logical partitions when the SPMD comes up. ENABLE_SPMD_LP is a build flag that is used to enable support for SPMD logical partitions. Note that the approach chosen is to keep SPMD and SPMC logical partition support separate, as opposed to extend the existing SPMC logical partition support since the code would need to have a number of ifdefs and the interactions with various build options such as SPMC_AT_EL3 needs to be accounted for, which would make code more complicated. Signed-off-by: Raghu Krishnamurthy <raghu.ncstate@gmail.com> Change-Id: I9642ddbf6ea26dd3f4a283baec598d61c07e3661
241 lines
6.2 KiB
C
241 lines
6.2 KiB
C
/*
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* Copyright (c) 2020-2022, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef BL_COMMON_LD_H
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#define BL_COMMON_LD_H
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#include <platform_def.h>
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#ifdef __aarch64__
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#define STRUCT_ALIGN 8
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#define BSS_ALIGN 16
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#else
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#define STRUCT_ALIGN 4
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#define BSS_ALIGN 8
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#endif
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#ifndef DATA_ALIGN
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#define DATA_ALIGN 1
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#endif
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#define CPU_OPS \
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. = ALIGN(STRUCT_ALIGN); \
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__CPU_OPS_START__ = .; \
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KEEP(*(.cpu_ops)) \
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__CPU_OPS_END__ = .;
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#define PARSER_LIB_DESCS \
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. = ALIGN(STRUCT_ALIGN); \
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__PARSER_LIB_DESCS_START__ = .; \
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KEEP(*(.img_parser_lib_descs)) \
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__PARSER_LIB_DESCS_END__ = .;
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#define RT_SVC_DESCS \
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. = ALIGN(STRUCT_ALIGN); \
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__RT_SVC_DESCS_START__ = .; \
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KEEP(*(.rt_svc_descs)) \
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__RT_SVC_DESCS_END__ = .;
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#if SPMC_AT_EL3
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#define EL3_LP_DESCS \
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. = ALIGN(STRUCT_ALIGN); \
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__EL3_LP_DESCS_START__ = .; \
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KEEP(*(.el3_lp_descs)) \
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__EL3_LP_DESCS_END__ = .;
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#else
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#define EL3_LP_DESCS
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#endif
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#if ENABLE_SPMD_LP
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#define SPMD_LP_DESCS \
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. = ALIGN(STRUCT_ALIGN); \
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__SPMD_LP_DESCS_START__ = .; \
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KEEP(*(.spmd_lp_descs)) \
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__SPMD_LP_DESCS_END__ = .;
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#else
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#define SPMD_LP_DESCS
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#endif
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#define PMF_SVC_DESCS \
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. = ALIGN(STRUCT_ALIGN); \
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__PMF_SVC_DESCS_START__ = .; \
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KEEP(*(.pmf_svc_descs)) \
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__PMF_SVC_DESCS_END__ = .;
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#define FCONF_POPULATOR \
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. = ALIGN(STRUCT_ALIGN); \
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__FCONF_POPULATOR_START__ = .; \
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KEEP(*(.fconf_populator)) \
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__FCONF_POPULATOR_END__ = .;
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/*
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* Keep the .got section in the RO section as it is patched prior to enabling
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* the MMU and having the .got in RO is better for security. GOT is a table of
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* addresses so ensure pointer size alignment.
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*/
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#define GOT \
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. = ALIGN(STRUCT_ALIGN); \
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__GOT_START__ = .; \
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*(.got) \
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__GOT_END__ = .;
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/*
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* The base xlat table
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*
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* It is put into the rodata section if PLAT_RO_XLAT_TABLES=1,
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* or into the bss section otherwise.
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*/
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#define BASE_XLAT_TABLE \
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. = ALIGN(16); \
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__BASE_XLAT_TABLE_START__ = .; \
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*(.base_xlat_table) \
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__BASE_XLAT_TABLE_END__ = .;
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#if PLAT_RO_XLAT_TABLES
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#define BASE_XLAT_TABLE_RO BASE_XLAT_TABLE
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#define BASE_XLAT_TABLE_BSS
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#else
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#define BASE_XLAT_TABLE_RO
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#define BASE_XLAT_TABLE_BSS BASE_XLAT_TABLE
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#endif
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#define RODATA_COMMON \
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RT_SVC_DESCS \
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FCONF_POPULATOR \
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PMF_SVC_DESCS \
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PARSER_LIB_DESCS \
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CPU_OPS \
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GOT \
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BASE_XLAT_TABLE_RO \
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EL3_LP_DESCS \
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SPMD_LP_DESCS
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/*
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* .data must be placed at a lower address than the stacks if the stack
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* protector is enabled. Alternatively, the .data.stack_protector_canary
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* section can be placed independently of the main .data section.
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*/
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#define DATA_SECTION \
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.data . : ALIGN(DATA_ALIGN) { \
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__DATA_START__ = .; \
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*(SORT_BY_ALIGNMENT(.data*)) \
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__DATA_END__ = .; \
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}
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/*
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* .rela.dyn needs to come after .data for the read-elf utility to parse
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* this section correctly.
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*/
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#if __aarch64__
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#define RELA_DYN_NAME .rela.dyn
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#define RELOC_SECTIONS_PATTERN *(.rela*)
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#else
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#define RELA_DYN_NAME .rel.dyn
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#define RELOC_SECTIONS_PATTERN *(.rel*)
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#endif
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#define RELA_SECTION \
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RELA_DYN_NAME : ALIGN(STRUCT_ALIGN) { \
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__RELA_START__ = .; \
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RELOC_SECTIONS_PATTERN \
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__RELA_END__ = .; \
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}
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#if !(defined(IMAGE_BL31) && RECLAIM_INIT_CODE)
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#define STACK_SECTION \
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.stacks (NOLOAD) : { \
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__STACKS_START__ = .; \
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*(.tzfw_normal_stacks) \
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__STACKS_END__ = .; \
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}
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#endif
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/*
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* If BL doesn't use any bakery lock then __PERCPU_BAKERY_LOCK_SIZE__
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* will be zero. For this reason, the only two valid values for
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* __PERCPU_BAKERY_LOCK_SIZE__ are 0 or the platform defined value
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* PLAT_PERCPU_BAKERY_LOCK_SIZE.
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*/
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#ifdef PLAT_PERCPU_BAKERY_LOCK_SIZE
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#define BAKERY_LOCK_SIZE_CHECK \
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ASSERT((__PERCPU_BAKERY_LOCK_SIZE__ == 0) || \
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(__PERCPU_BAKERY_LOCK_SIZE__ == PLAT_PERCPU_BAKERY_LOCK_SIZE), \
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"PLAT_PERCPU_BAKERY_LOCK_SIZE does not match bakery lock requirements");
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#else
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#define BAKERY_LOCK_SIZE_CHECK
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#endif
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/*
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* Bakery locks are stored in normal .bss memory
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*
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* Each lock's data is spread across multiple cache lines, one per CPU,
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* but multiple locks can share the same cache line.
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* The compiler will allocate enough memory for one CPU's bakery locks,
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* the remaining cache lines are allocated by the linker script
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*/
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#if !USE_COHERENT_MEM
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#define BAKERY_LOCK_NORMAL \
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. = ALIGN(CACHE_WRITEBACK_GRANULE); \
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__BAKERY_LOCK_START__ = .; \
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__PERCPU_BAKERY_LOCK_START__ = .; \
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*(.bakery_lock) \
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. = ALIGN(CACHE_WRITEBACK_GRANULE); \
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__PERCPU_BAKERY_LOCK_END__ = .; \
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__PERCPU_BAKERY_LOCK_SIZE__ = ABSOLUTE(__PERCPU_BAKERY_LOCK_END__ - __PERCPU_BAKERY_LOCK_START__); \
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. = . + (__PERCPU_BAKERY_LOCK_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \
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__BAKERY_LOCK_END__ = .; \
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BAKERY_LOCK_SIZE_CHECK
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#else
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#define BAKERY_LOCK_NORMAL
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#endif
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/*
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* Time-stamps are stored in normal .bss memory
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*
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* The compiler will allocate enough memory for one CPU's time-stamps,
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* the remaining memory for other CPUs is allocated by the
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* linker script
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*/
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#define PMF_TIMESTAMP \
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. = ALIGN(CACHE_WRITEBACK_GRANULE); \
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__PMF_TIMESTAMP_START__ = .; \
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KEEP(*(.pmf_timestamp_array)) \
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. = ALIGN(CACHE_WRITEBACK_GRANULE); \
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__PMF_PERCPU_TIMESTAMP_END__ = .; \
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__PERCPU_TIMESTAMP_SIZE__ = ABSOLUTE(. - __PMF_TIMESTAMP_START__); \
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. = . + (__PERCPU_TIMESTAMP_SIZE__ * (PLATFORM_CORE_COUNT - 1)); \
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__PMF_TIMESTAMP_END__ = .;
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/*
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* The .bss section gets initialised to 0 at runtime.
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* Its base address has bigger alignment for better performance of the
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* zero-initialization code.
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*/
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#define BSS_SECTION \
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.bss (NOLOAD) : ALIGN(BSS_ALIGN) { \
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__BSS_START__ = .; \
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*(SORT_BY_ALIGNMENT(.bss*)) \
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*(COMMON) \
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BAKERY_LOCK_NORMAL \
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PMF_TIMESTAMP \
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BASE_XLAT_TABLE_BSS \
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__BSS_END__ = .; \
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}
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/*
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* The .xlat_table section is for full, aligned page tables (4K).
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* Removing them from .bss avoids forcing 4K alignment on
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* the .bss section. The tables are initialized to zero by the translation
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* tables library.
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*/
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#define XLAT_TABLE_SECTION \
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.xlat_table (NOLOAD) : { \
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__XLAT_TABLE_START__ = .; \
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*(.xlat_table) \
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__XLAT_TABLE_END__ = .; \
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}
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#endif /* BL_COMMON_LD_H */
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