Jayanth Dodderi Chidanand 989960cf94 refactor(cpus): convert the Cortex-A72 to use the errata framework ... This involves replacing: * the reset_func with the standard cpu_reset_func_{start,end} to apply errata automatically * the <cpu>_errata_report with the errata_report_shim to report errata automatically ...and for each erratum: * the prologue with the workaround_<type>_start to do the checks and framework registration automatically * the epilogue with the workaround_<type>_end * the checker function with the check_erratum_<type> to make it more descriptive It is important to note that the errata workaround sequences remain unchanged and preserve their git blame. Testing was conducted by: * Building for release with all errata flags enabled and running script in change 19136 to compare output of objdump for each errata. * Testing via script was not complete, as it directed to verify the check and the workaround functions of few erratas manually. * Manual comparison of disassembly of converted functions with non- converted functions aarch64-none-elf-objdump -D <trusted-firmware-a with conversion>/build/../release/bl31/bl31.elf vs aarch64-none-elf-objdump -D <trusted-firmware-a clean repo>/build/fvp/release/bl31/bl31.elf * Manual comparison of disassembly of both both files(bl31.elf) ensured,the ported changes were identical and hence verified. * Build for release with all errata flags enabled and run default tftf tests. CROSS_COMPILE=aarch64-none-elf- \ make PLAT=fvp \ ARCH=aarch64 \ DEBUG=0 \ HW_ASSISTED_COHERENCY=1 \ USE_COHERENT_MEM=0 \ CTX_INCLUDE_AARCH32_REGS=0 \ ERRATA_A72_859971=1 \ ERRATA_A72_1319367=1 \ WORKAROUND_CVE_2017_5715=1 \ WORKAROUND_CVE_2018_3639=1 \ WORKAROUND_CVE_2022_23960=1 \ BL33=/home/jaychi01/tf_a/tf-a-tests/build/fvp/release/tftf.bin \ fip all -j12 * Build for debug with all errata enabled and step through ArmDS at reset to ensure that if Errata are applicable then the workaround functions are entered precisely. Change-Id: I8ee5288f395b0391a242506e7effdb65ab4c4de7 Signed-off-by: Jayanth Dodderi Chidanand <jayanthdodderi.chidanand@arm.com>		2023-07-31 11:45:33 +01:00
..
aarch32	fix(cpus): fix minor issue seen with a9 cpu	2023-07-27 17:41:02 -05:00
aarch64	refactor(cpus): convert the Cortex-A72 to use the errata framework	2023-07-31 11:45:33 +01:00
cpu-ops.mk	fix(cpus): workaround for Neoverse V2 erratum 2801372	2023-07-21 16:52:36 +02:00
errata_report.c	fix(cpus): reduce generic_errata_report()'s size	2023-06-15 10:14:59 +01:00