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API documentation updated. Change-Id: Ice7511f8df5356851001d2f7dc2a46cfe318f9ba Co-authored-by: Yousuf A <yousuf.sait@arm.com> Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
116 lines
3.9 KiB
ReStructuredText
116 lines
3.9 KiB
ReStructuredText
Platform Interrupt Controller API documentation
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===============================================
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.. section-numbering::
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:suffix: .
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.. contents::
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This document lists the optional platform interrupt controller API that
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abstracts the runtime configuration and control of interrupt controller from the
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generic code. The mandatory APIs are described in the `porting guide`__.
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.. __: porting-guide.rst#interrupt-management-framework-in-bl31
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Function: unsigned int plat_ic_get_running_priority(void); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : void
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Return : unsigned int
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This API should return the priority of the interrupt the PE is currently
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servicing. This must be be called only after an interrupt has already been
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acknowledged via. ``plat_ic_acknowledge_interrupt``.
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In the case of ARM standard platforms using GIC, the *Running Priority Register*
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is read to determine the priority of the interrupt.
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Function: int plat_ic_is_spi(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : int
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The API should return whether the interrupt ID (first parameter) is categorized
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as a Shared Peripheral Interrupt. Shared Peripheral Interrupts are typically
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associated to system-wide peripherals, and these interrupts can target any PE in
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the system.
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Function: int plat_ic_is_ppi(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : int
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The API should return whether the interrupt ID (first parameter) is categorized
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as a Private Peripheral Interrupt. Private Peripheral Interrupts are typically
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associated with peripherals that are private to each PE. Interrupts from private
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peripherals target to that PE only.
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Function: int plat_ic_is_sgi(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : int
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The API should return whether the interrupt ID (first parameter) is categorized
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as a Software Generated Interrupt. Software Generated Interrupts are raised by
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explicit programming by software, and are typically used in inter-PE
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communication. Secure SGIs are reserved for use by Secure world software.
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Function: unsigned int plat_ic_get_interrupt_active(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : int
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This API should return the *active* status of the interrupt ID specified by the
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first parameter, ``id``.
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In case of ARM standard platforms using GIC, the implementation of the API reads
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the GIC *Set Active Register* to read and return the active status of the
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interrupt.
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Function: void plat_ic_enable_interrupt(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : void
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This API should enable the interrupt ID specified by the first parameter,
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``id``. PEs in the system are expected to receive only enabled interrupts.
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In case of ARM standard platforms using GIC, the implementation of the API
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inserts barrier to make memory updates visible before enabling interrupt, and
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then writes to GIC *Set Enable Register* to enable the interrupt.
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Function: void plat_ic_disable_interrupt(unsigned int id); [optional]
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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::
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Argument : unsigned int
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Return : void
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This API should disable the interrupt ID specified by the first parameter,
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``id``. PEs in the system are not expected to receive disabled interrupts.
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In case of ARM standard platforms using GIC, the implementation of the API
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writes to GIC *Clear Enable Register* to disable the interrupt, and inserts
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barrier to make memory updates visible afterwards.
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----
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*Copyright (c) 2017, ARM Limited and Contributors. All rights reserved.*
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