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Disabling filter 0 causes inability to access DRAM. An attempt leads to an abort. ARM manual disallows to disable filter 0, but if we do that from SRAM, nothing bad happens. This patch prevents disabling of a filter 0, allowing to reconfigure other filters from DRAM. Note: this patch doesn't change the logic after reset. It is only needed in case someone wants to reconfigure the previously configured TZASC. Change-Id: I196a0cb110a89afbde97f64a94df3101f28708a4 Signed-off-by: stsp@users.sourceforge.net
360 lines
9.6 KiB
C
360 lines
9.6 KiB
C
/*
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* Copyright (c) 2016-2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <assert.h>
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#include <stddef.h>
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#include <common/debug.h>
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#include <drivers/arm/tzc400.h>
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#include <lib/mmio.h>
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#include <lib/utils_def.h>
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#include "tzc_common_private.h"
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/*
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* Macros which will be used by common core functions.
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*/
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#define TZC_400_REGION_BASE_LOW_0_OFFSET U(0x100)
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#define TZC_400_REGION_BASE_HIGH_0_OFFSET U(0x104)
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#define TZC_400_REGION_TOP_LOW_0_OFFSET U(0x108)
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#define TZC_400_REGION_TOP_HIGH_0_OFFSET U(0x10c)
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#define TZC_400_REGION_ATTR_0_OFFSET U(0x110)
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#define TZC_400_REGION_ID_ACCESS_0_OFFSET U(0x114)
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/*
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* Implementation defined values used to validate inputs later.
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* Filters : max of 4 ; 0 to 3
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* Regions : max of 9 ; 0 to 8
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* Address width : Values between 32 to 64
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*/
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typedef struct tzc400_instance {
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uintptr_t base;
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uint8_t addr_width;
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uint8_t num_filters;
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uint8_t num_regions;
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} tzc400_instance_t;
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static tzc400_instance_t tzc400;
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static inline unsigned int _tzc400_read_build_config(uintptr_t base)
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{
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return mmio_read_32(base + BUILD_CONFIG_OFF);
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}
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static inline unsigned int _tzc400_read_gate_keeper(uintptr_t base)
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{
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return mmio_read_32(base + GATE_KEEPER_OFF);
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}
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static inline void _tzc400_write_gate_keeper(uintptr_t base, unsigned int val)
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{
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mmio_write_32(base + GATE_KEEPER_OFF, val);
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}
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/*
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* Get the open status information for all filter units.
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*/
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#define get_gate_keeper_os(_base) ((_tzc400_read_gate_keeper(_base) >> \
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GATE_KEEPER_OS_SHIFT) & \
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GATE_KEEPER_OS_MASK)
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/* Define common core functions used across different TZC peripherals. */
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DEFINE_TZC_COMMON_WRITE_ACTION(400, 400)
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DEFINE_TZC_COMMON_WRITE_REGION_BASE(400, 400)
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DEFINE_TZC_COMMON_WRITE_REGION_TOP(400, 400)
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DEFINE_TZC_COMMON_WRITE_REGION_ATTRIBUTES(400, 400)
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DEFINE_TZC_COMMON_WRITE_REGION_ID_ACCESS(400, 400)
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DEFINE_TZC_COMMON_UPDATE_FILTERS(400, 400)
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DEFINE_TZC_COMMON_CONFIGURE_REGION0(400)
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DEFINE_TZC_COMMON_CONFIGURE_REGION(400)
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static void _tzc400_clear_it(uintptr_t base, uint32_t filter)
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{
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mmio_write_32(base + INT_CLEAR, BIT_32(filter));
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}
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static uint32_t _tzc400_get_int_by_filter(uintptr_t base, uint32_t filter)
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{
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return mmio_read_32(base + INT_STATUS) & BIT_32(filter);
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}
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#if DEBUG
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static unsigned long _tzc400_get_fail_address(uintptr_t base, uint32_t filter)
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{
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unsigned long fail_address;
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fail_address = mmio_read_32(base + FAIL_ADDRESS_LOW_OFF +
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(filter * FILTER_OFFSET));
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#ifdef __aarch64__
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fail_address += (unsigned long)mmio_read_32(base + FAIL_ADDRESS_HIGH_OFF +
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(filter * FILTER_OFFSET)) << 32;
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#endif
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return fail_address;
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}
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static uint32_t _tzc400_get_fail_id(uintptr_t base, uint32_t filter)
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{
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return mmio_read_32(base + FAIL_ID + (filter * FILTER_OFFSET));
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}
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static uint32_t _tzc400_get_fail_control(uintptr_t base, uint32_t filter)
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{
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return mmio_read_32(base + FAIL_CONTROL_OFF + (filter * FILTER_OFFSET));
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}
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static void _tzc400_dump_fail_filter(uintptr_t base, uint32_t filter)
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{
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uint32_t control_fail;
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uint32_t fail_id;
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unsigned long address_fail;
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address_fail = _tzc400_get_fail_address(base, filter);
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ERROR("Illegal access to 0x%lx:\n", address_fail);
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fail_id = _tzc400_get_fail_id(base, filter);
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ERROR("\tFAIL_ID = 0x%x\n", fail_id);
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control_fail = _tzc400_get_fail_control(base, filter);
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if (((control_fail & BIT_32(FAIL_CONTROL_NS_SHIFT)) >> FAIL_CONTROL_NS_SHIFT) ==
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FAIL_CONTROL_NS_NONSECURE) {
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ERROR("\tNon-Secure\n");
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} else {
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ERROR("\tSecure\n");
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}
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if (((control_fail & BIT_32(FAIL_CONTROL_PRIV_SHIFT)) >> FAIL_CONTROL_PRIV_SHIFT) ==
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FAIL_CONTROL_PRIV_PRIV) {
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ERROR("\tPrivilege\n");
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} else {
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ERROR("\tUnprivilege\n");
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}
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if (((control_fail & BIT_32(FAIL_CONTROL_DIR_SHIFT)) >> FAIL_CONTROL_DIR_SHIFT) ==
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FAIL_CONTROL_DIR_WRITE) {
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ERROR("\tWrite\n");
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} else {
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ERROR("\tRead\n");
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}
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}
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#endif /* DEBUG */
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static unsigned int _tzc400_get_gate_keeper(uintptr_t base,
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unsigned int filter)
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{
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unsigned int open_status;
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open_status = get_gate_keeper_os(base);
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return (open_status >> filter) & GATE_KEEPER_FILTER_MASK;
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}
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/* This function is not MP safe. */
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static void _tzc400_set_gate_keeper(uintptr_t base,
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unsigned int filter,
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int val)
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{
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unsigned int open_status;
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/* Upper half is current state. Lower half is requested state. */
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open_status = get_gate_keeper_os(base);
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if (val != 0)
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open_status |= (1UL << filter);
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else
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open_status &= ~(1UL << filter);
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_tzc400_write_gate_keeper(base, (open_status & GATE_KEEPER_OR_MASK) <<
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GATE_KEEPER_OR_SHIFT);
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/* Wait here until we see the change reflected in the TZC status. */
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while ((get_gate_keeper_os(base)) != open_status)
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;
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}
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void tzc400_set_action(unsigned int action)
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{
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assert(tzc400.base != 0U);
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assert(action <= TZC_ACTION_ERR_INT);
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_tzc400_write_action(tzc400.base, action);
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}
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void tzc400_init(uintptr_t base)
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{
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#if DEBUG
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unsigned int tzc400_id;
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#endif
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unsigned int tzc400_build;
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assert(base != 0U);
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tzc400.base = base;
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#if DEBUG
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tzc400_id = _tzc_read_peripheral_id(base);
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if (tzc400_id != TZC_400_PERIPHERAL_ID) {
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ERROR("TZC-400 : Wrong device ID (0x%x).\n", tzc400_id);
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panic();
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}
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#endif
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/* Save values we will use later. */
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tzc400_build = _tzc400_read_build_config(tzc400.base);
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tzc400.num_filters = (uint8_t)((tzc400_build >> BUILD_CONFIG_NF_SHIFT) &
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BUILD_CONFIG_NF_MASK) + 1U;
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tzc400.addr_width = (uint8_t)((tzc400_build >> BUILD_CONFIG_AW_SHIFT) &
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BUILD_CONFIG_AW_MASK) + 1U;
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tzc400.num_regions = (uint8_t)((tzc400_build >> BUILD_CONFIG_NR_SHIFT) &
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BUILD_CONFIG_NR_MASK) + 1U;
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}
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/*
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* `tzc400_configure_region0` is used to program region 0 into the TrustZone
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* controller. Region 0 covers the whole address space that is not mapped
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* to any other region, and is enabled on all filters; this cannot be
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* changed. This function only changes the access permissions.
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*/
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void tzc400_configure_region0(unsigned int sec_attr,
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unsigned int ns_device_access)
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{
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assert(tzc400.base != 0U);
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assert(sec_attr <= TZC_REGION_S_RDWR);
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_tzc400_configure_region0(tzc400.base, sec_attr, ns_device_access);
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}
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/*
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* `tzc400_configure_region` is used to program regions into the TrustZone
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* controller. A region can be associated with more than one filter. The
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* associated filters are passed in as a bitmap (bit0 = filter0), except that
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* the value TZC_400_REGION_ATTR_FILTER_BIT_ALL selects all filters, based on
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* the value of tzc400.num_filters.
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* NOTE:
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* Region 0 is special; it is preferable to use tzc400_configure_region0
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* for this region (see comment for that function).
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*/
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void tzc400_configure_region(unsigned int filters,
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unsigned int region,
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unsigned long long region_base,
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unsigned long long region_top,
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unsigned int sec_attr,
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unsigned int nsaid_permissions)
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{
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assert(tzc400.base != 0U);
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/* Adjust filter mask by real filter number */
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if (filters == TZC_400_REGION_ATTR_FILTER_BIT_ALL) {
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filters = (1U << tzc400.num_filters) - 1U;
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}
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/* Do range checks on filters and regions. */
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assert(((filters >> tzc400.num_filters) == 0U) &&
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(region < tzc400.num_regions));
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/*
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* Do address range check based on TZC configuration. A 64bit address is
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* the max and expected case.
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*/
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assert((region_top <= (UINT64_MAX >> (64U - tzc400.addr_width))) &&
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(region_base < region_top));
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/* region_base and (region_top + 1) must be 4KB aligned */
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assert(((region_base | (region_top + 1U)) & (4096U - 1U)) == 0U);
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assert(sec_attr <= TZC_REGION_S_RDWR);
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_tzc400_configure_region(tzc400.base, filters, region, region_base,
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region_top,
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sec_attr, nsaid_permissions);
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}
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void tzc400_update_filters(unsigned int region, unsigned int filters)
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{
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/* Do range checks on filters and regions. */
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assert(((filters >> tzc400.num_filters) == 0U) &&
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(region < tzc400.num_regions));
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_tzc400_update_filters(tzc400.base, region, tzc400.num_filters, filters);
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}
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void tzc400_enable_filters(void)
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{
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unsigned int state;
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unsigned int filter;
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assert(tzc400.base != 0U);
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for (filter = 0U; filter < tzc400.num_filters; filter++) {
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state = _tzc400_get_gate_keeper(tzc400.base, filter);
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if (state != 0U) {
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/* Filter 0 is special and cannot be disabled.
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* So here we allow it being already enabled. */
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if (filter == 0U) {
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continue;
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}
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/*
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* The TZC filter is already configured. Changing the
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* programmer's view in an active system can cause
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* unpredictable behavior therefore panic for now rather
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* than try to determine whether this is safe in this
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* instance.
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*
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* See the 'ARM (R) CoreLink TM TZC-400 TrustZone (R)
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* Address Space Controller' Technical Reference Manual.
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*/
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ERROR("TZC-400 : Filter %d Gatekeeper already"
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" enabled.\n", filter);
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panic();
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}
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_tzc400_set_gate_keeper(tzc400.base, filter, 1);
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}
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}
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void tzc400_disable_filters(void)
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{
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unsigned int filter;
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unsigned int state;
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unsigned int start = 0U;
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assert(tzc400.base != 0U);
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/* Filter 0 is special and cannot be disabled. */
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state = _tzc400_get_gate_keeper(tzc400.base, 0);
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if (state != 0U) {
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start++;
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}
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for (filter = start; filter < tzc400.num_filters; filter++)
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_tzc400_set_gate_keeper(tzc400.base, filter, 0);
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}
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int tzc400_it_handler(void)
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{
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uint32_t filter;
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uint32_t filter_it_pending = tzc400.num_filters;
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assert(tzc400.base != 0U);
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for (filter = 0U; filter < tzc400.num_filters; filter++) {
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if (_tzc400_get_int_by_filter(tzc400.base, filter) != 0U) {
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filter_it_pending = filter;
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break;
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}
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}
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if (filter_it_pending == tzc400.num_filters) {
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ERROR("TZC-400: No interrupt pending!\n");
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return -1;
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}
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#if DEBUG
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_tzc400_dump_fail_filter(tzc400.base, filter_it_pending);
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#endif
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_tzc400_clear_it(tzc400.base, filter_it_pending);
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return 0;
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}
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