mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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b4939bef12
Those storage macros are common to all STM32MPU chips, move them to plat/st/common/include/stm32mp_io_storage.h Signed-off-by: Yann Gautier <yann.gautier@foss.st.com> Change-Id: Id20ec00ba65edf9ec7a3a89adfda307c954c3cb6
127 lines
3.7 KiB
C
127 lines
3.7 KiB
C
/*
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* Copyright (C) 2021-2023, STMicroelectronics - All Rights Reserved
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#ifndef STM32MP1_FIP_DEF_H
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#define STM32MP1_FIP_DEF_H
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#if STM32MP15_OPTEE_RSV_SHM
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#define STM32MP_DDR_S_SIZE U(0x01E00000) /* 30 MB */
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#define STM32MP_DDR_SHMEM_SIZE U(0x00200000) /* 2 MB */
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#else
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#define STM32MP_DDR_S_SIZE U(0x02000000) /* 32 MB */
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#define STM32MP_DDR_SHMEM_SIZE U(0) /* empty */
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#endif
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#if TRUSTED_BOARD_BOOT && !STM32MP_USE_EXTERNAL_HEAP
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#if STM32MP15
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#define STM32MP_BL2_RO_SIZE U(0x00014000) /* 80 KB */
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#define STM32MP_BL2_SIZE U(0x0001B000) /* 108 KB for BL2 */
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#endif /* STM32MP15 */
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#else /* TRUSTED_BOARD_BOOT && !STM32MP_USE_EXTERNAL_HEAP */
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#if STM32MP13
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#if BL2_IN_XIP_MEM
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#define STM32MP_BL2_RO_SIZE U(0x00015000) /* 84 KB */
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#define STM32MP_BL2_SIZE U(0x00017000) /* 92 KB for BL2 */
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#else
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/* STM32MP_BL2_RO_SIZE not used if !BL2_IN_XIP_MEM */
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#define STM32MP_BL2_SIZE U(0x0001B000) /* 108KB for BL2 */
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/* with 20KB for DTB, SYSRAM is full */
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#endif
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#endif /* STM32MP13 */
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#if STM32MP15
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#define STM32MP_BL2_RO_SIZE U(0x00011000) /* 68 KB */
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#define STM32MP_BL2_SIZE U(0x00016000) /* 88 KB for BL2 */
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#endif /* STM32MP15 */
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#endif /* TRUSTED_BOARD_BOOT && !STM32MP_USE_EXTERNAL_HEAP */
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#if STM32MP13
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#if TRUSTED_BOARD_BOOT
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#define STM32MP_BL2_DTB_SIZE U(0x00005000) /* 20 KB for DTB */
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#else /* TRUSTED_BOARD_BOOT */
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#define STM32MP_BL2_DTB_SIZE U(0x00004000) /* 16 KB for DTB */
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#endif /* TRUSTED_BOARD_BOOT */
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#endif /* STM32MP13 */
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#if STM32MP15
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#define STM32MP_BL2_DTB_SIZE U(0x00007000) /* 28 KB for DTB */
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#endif /* STM32MP15 */
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#define STM32MP_BL32_SIZE U(0x0001B000) /* 108 KB for BL32 */
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#define STM32MP_BL32_DTB_SIZE U(0x00005000) /* 20 KB for DTB */
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#define STM32MP_FW_CONFIG_MAX_SIZE PAGE_SIZE /* 4 KB for FCONF DTB */
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#define STM32MP_HW_CONFIG_MAX_SIZE U(0x40000) /* 256 KB for HW config DTB */
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#if STM32MP13
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#define STM32MP_BL2_BASE (STM32MP_BL2_DTB_BASE + \
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STM32MP_BL2_DTB_SIZE)
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#endif /* STM32MP13 */
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#if STM32MP15
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#define STM32MP_BL2_BASE (STM32MP_SEC_SYSRAM_BASE + \
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STM32MP_SEC_SYSRAM_SIZE - \
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STM32MP_BL2_SIZE)
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#endif /* STM32MP15 */
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#define STM32MP_BL2_RO_BASE STM32MP_BL2_BASE
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#define STM32MP_BL2_RW_BASE (STM32MP_BL2_RO_BASE + \
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STM32MP_BL2_RO_SIZE)
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#if STM32MP13
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#define STM32MP_BL2_RW_SIZE (STM32MP_SYSRAM_BASE + \
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STM32MP_SYSRAM_SIZE - \
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STM32MP_BL2_RW_BASE)
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#define STM32MP_BL2_DTB_BASE STM32MP_SEC_SYSRAM_BASE
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#endif /* STM32MP13 */
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#if STM32MP15
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#define STM32MP_BL2_RW_SIZE (STM32MP_SEC_SYSRAM_BASE + \
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STM32MP_SEC_SYSRAM_SIZE - \
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STM32MP_BL2_RW_BASE)
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#define STM32MP_BL2_DTB_BASE (STM32MP_BL2_BASE - \
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STM32MP_BL2_DTB_SIZE)
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#endif /* STM32MP15 */
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#define STM32MP_BL32_DTB_BASE STM32MP_SYSRAM_BASE
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#define STM32MP_BL32_BASE (STM32MP_BL32_DTB_BASE + \
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STM32MP_BL32_DTB_SIZE)
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#if defined(IMAGE_BL2)
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#define STM32MP_DTB_SIZE STM32MP_BL2_DTB_SIZE
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#define STM32MP_DTB_BASE STM32MP_BL2_DTB_BASE
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#endif
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#if defined(IMAGE_BL32)
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#define STM32MP_DTB_SIZE STM32MP_BL32_DTB_SIZE
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#define STM32MP_DTB_BASE STM32MP_BL32_DTB_BASE
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#endif
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#ifdef AARCH32_SP_OPTEE
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#define STM32MP_OPTEE_BASE STM32MP_SEC_SYSRAM_BASE
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#define STM32MP_OPTEE_SIZE (STM32MP_BL2_DTB_BASE - \
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STM32MP_OPTEE_BASE)
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#endif
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#if STM32MP13
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#define STM32MP_FW_CONFIG_BASE SRAM3_BASE
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#endif /* STM32MP13 */
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#if STM32MP15
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#define STM32MP_FW_CONFIG_BASE (STM32MP_SYSRAM_BASE + \
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STM32MP_SYSRAM_SIZE - \
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PAGE_SIZE)
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#endif /* STM32MP15 */
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#define STM32MP_HW_CONFIG_BASE (STM32MP_BL33_BASE + \
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STM32MP_BL33_MAX_SIZE)
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/*
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* MAX_MMAP_REGIONS is usually:
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* BL stm32mp1_mmap size + mmap regions in *_plat_arch_setup
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*/
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#if defined(IMAGE_BL32)
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#define MAX_MMAP_REGIONS 10
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#endif
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#endif /* STM32MP1_FIP_DEF_H */
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