mirror of
https://github.com/ARM-software/arm-trusted-firmware.git
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1ae0a49a37
This patch adds an API in runtime service framework to invoke the registered handler corresponding to the SMC function identifier. This is helpful for AArch32 because the number of arguments required by the handler is more than registers available as per AArch32 program calling conventions and requires the use of stack. Hence this new API will do the necessary argument setup and invoke the appropriate handler. Although this API is primarily intended for AArch32, it can be used for AArch64 as well. Change-Id: Iefa15947fe5a1df55b0859886e677446a0fd7241
98 lines
3.6 KiB
C
98 lines
3.6 KiB
C
/*
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* Copyright (c) 2015-2016, ARM Limited and Contributors. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* Redistributions of source code must retain the above copyright notice, this
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* list of conditions and the following disclaimer.
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*
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* Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* Neither the name of ARM nor the names of its contributors may be used
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* to endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef __SMCC_HELPERS_H__
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#define __SMCC_HELPERS_H__
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#include <smcc.h>
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#ifndef __ASSEMBLY__
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#include <context.h>
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/* Convenience macros to return from SMC handler */
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#define SMC_RET0(_h) { \
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return (uint64_t) (_h); \
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}
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#define SMC_RET1(_h, _x0) { \
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write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X0, (_x0)); \
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SMC_RET0(_h); \
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}
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#define SMC_RET2(_h, _x0, _x1) { \
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write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X1, (_x1)); \
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SMC_RET1(_h, (_x0)); \
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}
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#define SMC_RET3(_h, _x0, _x1, _x2) { \
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write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X2, (_x2)); \
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SMC_RET2(_h, (_x0), (_x1)); \
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}
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#define SMC_RET4(_h, _x0, _x1, _x2, _x3) { \
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write_ctx_reg(get_gpregs_ctx(_h), CTX_GPREG_X3, (_x3)); \
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SMC_RET3(_h, (_x0), (_x1), (_x2)); \
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}
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/*
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* Convenience macros to access general purpose registers using handle provided
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* to SMC handler. These take the offset values defined in context.h
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*/
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#define SMC_GET_GP(_h, _g) \
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read_ctx_reg(get_gpregs_ctx(_h), (_g))
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#define SMC_SET_GP(_h, _g, _v) \
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write_ctx_reg(get_gpregs_ctx(_h), (_g), (_v))
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/*
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* Convenience macros to access EL3 context registers using handle provided to
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* SMC handler. These take the offset values defined in context.h
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*/
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#define SMC_GET_EL3(_h, _e) \
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read_ctx_reg(get_el3state_ctx(_h), (_e))
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#define SMC_SET_EL3(_h, _e, _v) \
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write_ctx_reg(get_el3state_ctx(_h), (_e), (_v))
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/* Return a UUID in the SMC return registers */
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#define SMC_UUID_RET(_h, _uuid) \
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SMC_RET4(handle, ((const uint32_t *) &(_uuid))[0], \
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((const uint32_t *) &(_uuid))[1], \
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((const uint32_t *) &(_uuid))[2], \
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((const uint32_t *) &(_uuid))[3])
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/*
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* Helper macro to retrieve the SMC parameters from cpu_context_t.
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*/
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#define get_smc_params_from_ctx(_hdl, _x1, _x2, _x3, _x4) \
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do { \
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const gp_regs_t *regs = get_gpregs_ctx(_hdl); \
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_x1 = read_ctx_reg(regs, CTX_GPREG_X1); \
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_x2 = read_ctx_reg(regs, CTX_GPREG_X2); \
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_x3 = read_ctx_reg(regs, CTX_GPREG_X3); \
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_x4 = read_ctx_reg(regs, CTX_GPREG_X4); \
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} while (0)
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#endif /*__ASSEMBLY__*/
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#endif /* __SMCC_HELPERS_H__ */
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