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By default the Arm Ethos-N NPU will boot up in secure mode. In this mode the non-secure world cannot access the registers needed to use the NPU. To still allow the non-secure world to use the NPU, a SiP service has been added that can delegate non-secure access to the registers needed to use it. Only the HW_CONFIG for the Arm Juno platform has been updated to include the device tree for the NPU and the platform currently only loads the HW_CONFIG in AArch64 builds. Signed-off-by: Mikael Olsson <mikael.olsson@arm.com> Change-Id: I65dfd864042ed43faae0a259dcf319cbadb5f3d2
143 lines
2.9 KiB
C
143 lines
2.9 KiB
C
/*
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* Copyright (c) 2016-2019,2021, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <stdint.h>
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#include <common/debug.h>
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#include <common/runtime_svc.h>
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#include <drivers/arm/ethosn.h>
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#include <lib/debugfs.h>
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#include <lib/pmf/pmf.h>
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#include <plat/arm/common/arm_sip_svc.h>
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#include <plat/arm/common/plat_arm.h>
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#include <tools_share/uuid.h>
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/* ARM SiP Service UUID */
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DEFINE_SVC_UUID2(arm_sip_svc_uid,
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0x556d75e2, 0x6033, 0xb54b, 0xb5, 0x75,
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0x62, 0x79, 0xfd, 0x11, 0x37, 0xff);
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static int arm_sip_setup(void)
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{
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if (pmf_setup() != 0) {
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return 1;
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}
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#if USE_DEBUGFS
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if (debugfs_smc_setup() != 0) {
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return 1;
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}
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#endif /* USE_DEBUGFS */
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return 0;
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}
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/*
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* This function handles ARM defined SiP Calls
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*/
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static uintptr_t arm_sip_handler(unsigned int smc_fid,
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u_register_t x1,
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u_register_t x2,
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u_register_t x3,
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u_register_t x4,
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void *cookie,
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void *handle,
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u_register_t flags)
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{
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int call_count = 0;
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#if ENABLE_PMF
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/*
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* Dispatch PMF calls to PMF SMC handler and return its return
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* value
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*/
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if (is_pmf_fid(smc_fid)) {
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return pmf_smc_handler(smc_fid, x1, x2, x3, x4, cookie,
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handle, flags);
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}
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#endif /* ENABLE_PMF */
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#if USE_DEBUGFS
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if (is_debugfs_fid(smc_fid)) {
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return debugfs_smc_handler(smc_fid, x1, x2, x3, x4, cookie,
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handle, flags);
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}
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#endif /* USE_DEBUGFS */
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#if ARM_ETHOSN_NPU_DRIVER
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if (is_ethosn_fid(smc_fid)) {
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return ethosn_smc_handler(smc_fid, x1, x2, x3, x4, cookie,
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handle, flags);
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}
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#endif /* ARM_ETHOSN_NPU_DRIVER */
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switch (smc_fid) {
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case ARM_SIP_SVC_EXE_STATE_SWITCH: {
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/* Execution state can be switched only if EL3 is AArch64 */
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#ifdef __aarch64__
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/* Allow calls from non-secure only */
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if (!is_caller_non_secure(flags))
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SMC_RET1(handle, STATE_SW_E_DENIED);
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/*
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* Pointers used in execution state switch are all 32 bits wide
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*/
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return (uintptr_t) arm_execution_state_switch(smc_fid,
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(uint32_t) x1, (uint32_t) x2, (uint32_t) x3,
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(uint32_t) x4, handle);
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#else
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/* State switch denied */
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SMC_RET1(handle, STATE_SW_E_DENIED);
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#endif /* __aarch64__ */
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}
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case ARM_SIP_SVC_CALL_COUNT:
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/* PMF calls */
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call_count += PMF_NUM_SMC_CALLS;
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#if ARM_ETHOSN_NPU_DRIVER
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/* ETHOSN calls */
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call_count += ETHOSN_NUM_SMC_CALLS;
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#endif /* ARM_ETHOSN_NPU_DRIVER */
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/* State switch call */
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call_count += 1;
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SMC_RET1(handle, call_count);
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case ARM_SIP_SVC_UID:
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/* Return UID to the caller */
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SMC_UUID_RET(handle, arm_sip_svc_uid);
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case ARM_SIP_SVC_VERSION:
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/* Return the version of current implementation */
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SMC_RET2(handle, ARM_SIP_SVC_VERSION_MAJOR, ARM_SIP_SVC_VERSION_MINOR);
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default:
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WARN("Unimplemented ARM SiP Service Call: 0x%x \n", smc_fid);
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SMC_RET1(handle, SMC_UNK);
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}
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}
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/* Define a runtime service descriptor for fast SMC calls */
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DECLARE_RT_SVC(
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arm_sip_svc,
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OEN_SIP_START,
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OEN_SIP_END,
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SMC_TYPE_FAST,
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arm_sip_setup,
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arm_sip_handler
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);
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