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942013e1dd
The DSU contains system control registers in the SCU and L3 logic to control the functionality of the cluster. If "DIRECT CONNECT" L3 memory system variant is used, there won't be any L3 cache, snoop filter, and SCU logic present hence no system control register will be present. Hence check SCU presence before accessing DSU register for DSU_936184 errata. Signed-off-by: Pramod Kumar <pramod.kumar@broadcom.com> Change-Id: I1ffa8afb0447ae3bd1032c9dd678d68021fe5a63
141 lines
3.8 KiB
ArmAsm
141 lines
3.8 KiB
ArmAsm
/*
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* Copyright (c) 2019-2020, ARM Limited and Contributors. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <asm_macros.S>
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#include <dsu_def.h>
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#include <lib/cpus/errata_report.h>
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/* -----------------------------------------------------------------------
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* DSU erratum 798953 check function
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* Checks the DSU variant, revision and configuration to determine if
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* the erratum applies. Erratum applies on all configurations of the
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* DSU and if revision-variant is r0p0.
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*
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* The erratum was fixed in r0p1.
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*
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* This function is called from both assembly and C environment. So it
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* follows AAPCS.
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*
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* Clobbers: x0-x3
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* -----------------------------------------------------------------------
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*/
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.globl check_errata_dsu_798953
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.globl errata_dsu_798953_wa
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func check_errata_dsu_798953
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mov x2, #ERRATA_APPLIES
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mov x3, #ERRATA_NOT_APPLIES
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/* Check if DSU is equal to r0p0 */
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mrs x1, CLUSTERIDR_EL1
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/* DSU variant and revision bitfields in CLUSTERIDR are adjacent */
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ubfx x0, x1, #CLUSTERIDR_REV_SHIFT,\
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#(CLUSTERIDR_REV_BITS + CLUSTERIDR_VAR_BITS)
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mov x1, #(0x0 << CLUSTERIDR_REV_SHIFT)
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cmp x0, x1
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csel x0, x2, x3, EQ
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ret
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endfunc check_errata_dsu_798953
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/* --------------------------------------------------
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* Errata Workaround for DSU erratum #798953.
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*
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* Can clobber only: x0-x17
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* --------------------------------------------------
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*/
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func errata_dsu_798953_wa
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mov x17, x30
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bl check_errata_dsu_798953
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cbz x0, 1f
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/* If erratum applies, disable high-level clock gating */
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mrs x0, CLUSTERACTLR_EL1
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orr x0, x0, #CLUSTERACTLR_EL1_DISABLE_CLOCK_GATING
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msr CLUSTERACTLR_EL1, x0
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isb
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1:
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ret x17
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endfunc errata_dsu_798953_wa
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/* -----------------------------------------------------------------------
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* DSU erratum 936184 check function
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* Checks the DSU variant, revision and configuration to determine if
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* the erratum applies. Erratum applies if ACP interface is present
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* in the DSU and revision-variant < r2p0.
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*
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* The erratum was fixed in r2p0.
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*
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* This function is called from both assembly and C environment. So it
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* follows AAPCS.
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*
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* Clobbers: x0-x15
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* -----------------------------------------------------------------------
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*/
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.globl check_errata_dsu_936184
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.globl errata_dsu_936184_wa
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.weak is_scu_present_in_dsu
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/* --------------------------------------------------------------------
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* Default behaviour respresents SCU is always present with DSU.
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* CPUs can override this definition if required.
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*
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* Can clobber only: x0-x14
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* --------------------------------------------------------------------
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*/
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func is_scu_present_in_dsu
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mov x0, #1
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ret
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endfunc is_scu_present_in_dsu
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func check_errata_dsu_936184
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mov x15, x30
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bl is_scu_present_in_dsu
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cmp x0, xzr
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/* Default error status */
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mov x0, #ERRATA_NOT_APPLIES
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/* If SCU is not present, return without applying patch */
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b.eq 1f
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/* Erratum applies only if DSU has the ACP interface */
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mrs x1, CLUSTERCFR_EL1
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ubfx x1, x1, #CLUSTERCFR_ACP_SHIFT, #1
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cbz x1, 1f
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/* If ACP is present, check if DSU is older than r2p0 */
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mrs x1, CLUSTERIDR_EL1
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/* DSU variant and revision bitfields in CLUSTERIDR are adjacent */
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ubfx x2, x1, #CLUSTERIDR_REV_SHIFT,\
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#(CLUSTERIDR_REV_BITS + CLUSTERIDR_VAR_BITS)
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cmp x2, #(0x2 << CLUSTERIDR_VAR_SHIFT)
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b.hs 1f
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mov x0, #ERRATA_APPLIES
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1:
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ret x15
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endfunc check_errata_dsu_936184
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/* --------------------------------------------------
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* Errata Workaround for DSU erratum #936184.
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*
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* Can clobber only: x0-x17
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* --------------------------------------------------
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*/
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func errata_dsu_936184_wa
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mov x17, x30
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bl check_errata_dsu_936184
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cbz x0, 1f
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/* If erratum applies, we set a mask to a DSU control register */
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mrs x0, CLUSTERACTLR_EL1
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ldr x1, =DSU_ERRATA_936184_MASK
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orr x0, x0, x1
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msr CLUSTERACTLR_EL1, x0
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isb
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1:
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ret x17
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endfunc errata_dsu_936184_wa
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