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https://github.com/ARM-software/arm-trusted-firmware.git
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This corrects the MISRA violation C2012-15.5: A function should have a single point of exit at the end. Introduced a temporary variable to store the return value to ensure single return for the function. Change-Id: Ice3eb939664ffc62c1f586b641e37481f10ffff6 Signed-off-by: Nithin G <nithing@amd.com> Signed-off-by: Maheedhar Bollapalli <maheedharsai.bollapalli@amd.com>
339 lines
8.7 KiB
C
339 lines
8.7 KiB
C
/*
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* Copyright (c) 2013-2020, Arm Limited and Contributors. All rights reserved.
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* Copyright (c) 2019-2022, Xilinx, Inc. All rights reserved.
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* Copyright (c) 2022-2024, Advanced Micro Devices, Inc. All rights reserved.
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*
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* SPDX-License-Identifier: BSD-3-Clause
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*/
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#include <arch_helpers.h>
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#include <lib/bakery_lock.h>
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#include <lib/mmio.h>
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#include <lib/spinlock.h>
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#include <plat/common/platform.h>
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#include <ipi.h>
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#include <plat_ipi.h>
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#include <plat_private.h>
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#include "pm_defs.h"
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#include "pm_ipi.h"
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#define ERROR_CODE_MASK (0xFFFFU)
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#define PM_OFFSET (0U)
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/*
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* ARM v8.2, the cache will turn off automatically when cpu
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* power down. Therefore, there is no doubt to use the spin_lock here.
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*/
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#if !HW_ASSISTED_COHERENCY
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DEFINE_BAKERY_LOCK(pm_secure_lock);
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static inline void pm_ipi_lock_get(void)
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{
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bakery_lock_get(&pm_secure_lock);
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}
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static inline void pm_ipi_lock_release(void)
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{
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bakery_lock_release(&pm_secure_lock);
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}
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#else
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spinlock_t pm_secure_lock;
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static inline void pm_ipi_lock_get(void)
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{
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spin_lock(&pm_secure_lock);
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}
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static inline void pm_ipi_lock_release(void)
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{
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spin_unlock(&pm_secure_lock);
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}
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#endif
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/**
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* pm_ipi_init() - Initialize IPI peripheral for communication with
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* remote processor.
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* @proc: Pointer to the processor who is initiating request.
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*
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* Return: On success, the initialization function must return 0.
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* Any other return value will cause the framework to ignore
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* the service.
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*
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* Called from pm_setup initialization function.
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*/
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void pm_ipi_init(const struct pm_proc *proc)
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{
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ipi_mb_open(proc->ipi->local_ipi_id, proc->ipi->remote_ipi_id);
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}
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/**
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* pm_ipi_send_common() - Sends IPI request to the remote processor.
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* @proc: Pointer to the processor who is initiating request.
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* @payload: API id and call arguments to be written in IPI buffer.
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* @is_blocking: if to trigger the notification in blocking mode or not.
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*
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* Send an IPI request to the power controller. Caller needs to hold
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* the 'pm_secure_lock' lock.
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*
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* Return: Returns status, either success or error+reason.
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*
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*/
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static enum pm_ret_status pm_ipi_send_common(const struct pm_proc *proc,
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uint32_t payload[PAYLOAD_ARG_CNT],
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uint32_t is_blocking)
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{
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uint32_t offset = PM_OFFSET;
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uintptr_t buffer_base = proc->ipi->buffer_base +
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IPI_BUFFER_TARGET_REMOTE_OFFSET +
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IPI_BUFFER_REQ_OFFSET;
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#if IPI_CRC_CHECK
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payload[PAYLOAD_CRC_POS] = calculate_crc(payload, IPI_W0_TO_W6_SIZE);
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#endif
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/* Write payload into IPI buffer */
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for (size_t i = 0; i < PAYLOAD_ARG_CNT; i++) {
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mmio_write_32(buffer_base + offset, payload[i]);
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offset += PAYLOAD_ARG_SIZE;
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}
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/* Generate IPI to remote processor */
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ipi_mb_notify(proc->ipi->local_ipi_id, proc->ipi->remote_ipi_id,
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is_blocking);
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return PM_RET_SUCCESS;
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}
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/**
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* pm_ipi_send_non_blocking() - Sends IPI request to the remote processor
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* without blocking notification.
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* @proc: Pointer to the processor who is initiating request.
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* @payload: API id and call arguments to be written in IPI buffer.
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*
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* Send an IPI request to the power controller.
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*
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* Return: Returns status, either success or error+reason.
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*
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*/
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enum pm_ret_status pm_ipi_send_non_blocking(const struct pm_proc *proc,
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uint32_t payload[PAYLOAD_ARG_CNT])
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{
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enum pm_ret_status ret;
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pm_ipi_lock_get();
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ret = pm_ipi_send_common(proc, payload, IPI_NON_BLOCKING);
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pm_ipi_lock_release();
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return ret;
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}
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/**
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* pm_ipi_send() - Sends IPI request to the remote processor.
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* @proc: Pointer to the processor who is initiating request.
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* @payload: API id and call arguments to be written in IPI buffer.
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*
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* Send an IPI request to the power controller.
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*
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* Return: Returns status, either success or error+reason.
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*
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*/
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enum pm_ret_status pm_ipi_send(const struct pm_proc *proc,
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uint32_t payload[PAYLOAD_ARG_CNT])
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{
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enum pm_ret_status ret;
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pm_ipi_lock_get();
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ret = pm_ipi_send_common(proc, payload, IPI_BLOCKING);
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pm_ipi_lock_release();
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return ret;
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}
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/**
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* pm_ipi_buff_read() - Reads IPI response after remote processor has handled
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* interrupt.
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* @proc: Pointer to the processor who is waiting and reading response.
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* @value: Used to return value from IPI buffer element (optional).
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* @count: Number of values to return in @value.
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*
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* Return: Returns status, either success or error+reason.
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*
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*/
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static enum pm_ret_status pm_ipi_buff_read(const struct pm_proc *proc,
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uint32_t *value, size_t count)
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{
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size_t i;
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enum pm_ret_status ret;
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#if IPI_CRC_CHECK
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uint32_t crc;
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#endif
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uintptr_t buffer_base = proc->ipi->buffer_base +
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IPI_BUFFER_TARGET_REMOTE_OFFSET +
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IPI_BUFFER_RESP_OFFSET;
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/*
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* Read response from IPI buffer
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* buf-0: success or error+reason
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* buf-1: value
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* buf-2: unused
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* buf-3: unused
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*/
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for (i = 0U; i < count; i++) {
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value[i] = mmio_read_32(buffer_base + ((i + 1U) * PAYLOAD_ARG_SIZE));
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}
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ret = mmio_read_32(buffer_base);
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#if IPI_CRC_CHECK
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crc = mmio_read_32(buffer_base + (PAYLOAD_CRC_POS * PAYLOAD_ARG_SIZE));
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if (crc != calculate_crc((uint32_t *)buffer_base, IPI_W0_TO_W6_SIZE)) {
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NOTICE("ERROR in CRC response payload value:0x%x\n", crc);
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ret = PM_RET_ERROR_INVALID_CRC;
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/* Payload data is invalid as CRC validation failed
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* Clear the payload to avoid leakage of data to upper layers
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*/
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memset(value, 0, count);
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}
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#endif
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return ret;
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}
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/**
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* pm_ipi_buff_read_callb() - Callback function that reads value from
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* ipi response buffer.
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* @value: Used to return value from IPI buffer element.
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* @count: Number of values to return in @value.
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*
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* This callback function fills requested data in @value from ipi response
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* buffer.
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*
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* Return: Returns status, either success or error.
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*
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*/
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enum pm_ret_status pm_ipi_buff_read_callb(uint32_t *value, size_t count)
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{
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size_t i;
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size_t local_count = count;
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#if IPI_CRC_CHECK
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uint32_t crc;
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#endif
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uintptr_t buffer_base = IPI_BUFFER_REMOTE_BASE +
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IPI_BUFFER_TARGET_LOCAL_OFFSET +
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IPI_BUFFER_REQ_OFFSET;
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enum pm_ret_status ret = PM_RET_SUCCESS;
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if (local_count > (uint32_t)IPI_BUFFER_MAX_WORDS) {
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local_count = IPI_BUFFER_MAX_WORDS;
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}
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for (i = 0; i < count; i++) {
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value[i] = mmio_read_32(buffer_base + (i * PAYLOAD_ARG_SIZE));
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}
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#if IPI_CRC_CHECK
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crc = mmio_read_32(buffer_base + (PAYLOAD_CRC_POS * PAYLOAD_ARG_SIZE));
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if (crc != calculate_crc((uint32_t *)buffer_base, IPI_W0_TO_W6_SIZE)) {
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NOTICE("ERROR in CRC response payload value:0x%x\n", crc);
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ret = PM_RET_ERROR_INVALID_CRC;
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/* Payload data is invalid as CRC validation failed
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* Clear the payload to avoid leakage of data to upper layers
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*/
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memset(value, 0, local_count);
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}
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#endif
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return ret;
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}
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/**
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* pm_ipi_send_sync() - Sends IPI request to the remote processor.
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* @proc: Pointer to the processor who is initiating request.
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* @payload: API id and call arguments to be written in IPI buffer.
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* @value: Used to return value from IPI buffer element (optional).
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* @count: Number of values to return in @value.
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*
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* Send an IPI request to the power controller and wait for it to be handled.
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*
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* Return: Returns status, either success or error+reason and, optionally,
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* @value.
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*
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*/
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enum pm_ret_status pm_ipi_send_sync(const struct pm_proc *proc,
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uint32_t payload[PAYLOAD_ARG_CNT],
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uint32_t *value, size_t count)
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{
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enum pm_ret_status ret;
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pm_ipi_lock_get();
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ret = pm_ipi_send_common(proc, payload, IPI_BLOCKING);
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if (ret != PM_RET_SUCCESS) {
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goto unlock;
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}
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ret = ERROR_CODE_MASK & (uint32_t)(pm_ipi_buff_read(proc, value, count));
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unlock:
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pm_ipi_lock_release();
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return ret;
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}
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void pm_ipi_irq_enable(const struct pm_proc *proc)
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{
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ipi_mb_enable_irq(proc->ipi->local_ipi_id, proc->ipi->remote_ipi_id);
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}
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void pm_ipi_irq_clear(const struct pm_proc *proc)
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{
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ipi_mb_ack(proc->ipi->local_ipi_id, proc->ipi->remote_ipi_id);
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}
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uint32_t pm_ipi_irq_status(const struct pm_proc *proc)
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{
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int32_t ret;
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int32_t result = 0;
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ret = ipi_mb_enquire_status(proc->ipi->local_ipi_id,
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proc->ipi->remote_ipi_id);
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if (((uint32_t)ret & IPI_MB_STATUS_RECV_PENDING) != 0U) {
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result = 1;
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} else {
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result = 0;
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}
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return result;
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}
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#if IPI_CRC_CHECK
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uint32_t calculate_crc(uint32_t payload[PAYLOAD_ARG_CNT], uint32_t bufsize)
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{
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uint32_t crcinit = CRC_INIT_VALUE;
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uint32_t order = CRC_ORDER;
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uint32_t polynom = CRC_POLYNOM;
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uint32_t i, j, c, bit, datain, crcmask, crchighbit;
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uint32_t crc = crcinit;
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crcmask = ((uint32_t)((1U << (order - 1U)) - 1U) << 1U) | 1U;
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crchighbit = (uint32_t)(1U << (order - 1U));
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for (i = 0U; i < bufsize; i++) {
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datain = mmio_read_8((unsigned long)payload + i);
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c = datain;
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j = 0x80U;
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while (j != 0U) {
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bit = crc & crchighbit;
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crc <<= 1U;
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if (0U != (c & j))
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bit ^= crchighbit;
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if (bit != 0U)
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crc ^= polynom;
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j >>= 1U;
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}
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crc &= crcmask;
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}
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return crc;
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}
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#endif
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